參數(shù)資料
型號: DS3112N
廠商: Maxim Integrated Products
文件頁數(shù): 105/133頁
文件大?。?/td> 0K
描述: IC MUX TEMPE T3/E3 IND 256-BGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 40
控制器類型: 調(diào)幀器,多路復(fù)用器
接口: 并行/串行
電源電壓: 3.135 V ~ 3.465 V
電流 - 電源: 150mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-PBGA(27x27)
包裝: 管件
DS3112
73 of 133
Register Name:
T1LBCR1
Register Description:
T1 Line Loopback Command Register 1
Register Address:
58h
Bit #
7
6
5
4
3
2
1
0
Name
LB8
LB7
LB6
LB5
LB4
LB3
LB2
LB1
Default
0
Bit #
15
14
13
12
11
10
9
8
Name
LB16
LB15
LB14
LB13
LB12
LB11
LB10
LB9
Default
0
Note: Bits that are underlined are read-only; all other bits are read-write.
Bits 0 to 15: T1 Line Loopback Far End Activate Command for Ports 1 to 16 (LB1 to LB16). These bits cause
the appropriate T2 transmit formatter to generate a Line Loopback command for the far end. When this bit is set
high, the T2 transmit formatter will force the C3 bit to be the inverse of the C1 and C2 bits. The T2 transmit
formatter will continue to force the C3 bit to be the inverse of the C1 and C2 bits as long as this bit is held high.
When this bit is set low, C3 will match the C1 and C2 bits. LB1 corresponds to T1/E1 Port 1, LB2 corresponds to
T1/E1 Port 2, and so on. These bits are meaningless in the E3 and G.747 modes and should be set to 0.
0 = do not generate the line loopback command by inverting the C3 bit
1 = generate the line loopback command by inverting the C3 bit
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參數(shù)描述
DS3112N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC TEMPE T3/E3 MUX FRMR & M13/E13/G.747 MUX RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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