VCC 0V 1-Wire BUS IS DISCHARGED VI" />
參數(shù)資料
型號: DS2482S-100+T&R
廠商: Maxim Integrated Products
文件頁數(shù): 21/24頁
文件大?。?/td> 0K
描述: IC I2C TO 1WIRE BRIDGE 8SOIC
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: *
其它名稱: DS2482S-100+T&RDKR
Single-Channel 1-Wire Master
VCC
0V
1-Wire BUS IS DISCHARGED
VIL1(MAX)
VIH1(MIN)
t1
t2
tAPUOT
t3
APU = 1
APU = 0
Figure 2. Rising Edge Pullup
Configuration Register Bit Assignment
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
1WS
SPU
1
APU
1WS
SPU
0
APU
Device Registers
The DS2482-100 has three registers that the I2C host
can read: Configuration, Status, and Read Data. These
registers are addressed by a read pointer. The position
of the read pointer, i.e., the register that the host reads
in a subsequent read access, is defined by the instruc-
tion the DS2482-100 executed last. To enable certain
1-Wire features, the host has read and write access to
the Configuration Register.
Configuration Register
The DS2482-100 supports three 1-Wire features that
are enabled or selected through the Configuration
Register. These features are:
Active Pullup (APU)
Strong Pullup (SPU)
1-Wire Speed (1WS)
These features can be selected in any combination.
While APU and 1WS maintain their state, SPU returns to
its inactive state as soon as the strong pullup has ended.
After a device reset (power-up cycle or initiated by the
Device Reset command), the Configuration Register
reads 00h. When writing to the Configuration Register,
the new data is accepted only if the upper nibble (bits 7
to 4) is the one’s complement of the lower nibble (bits 3
to 0). When read, the upper nibble is always 0h.
Active Pullup (APU)
The APU bit controls whether an active pullup (con-
trolled slew-rate transistor) or a passive pullup (RWPU
resistor) is used to drive a 1-Wire line from low to high.
When APU = 0, active pullup is disabled (resistor
mode). Active pullup should always be selected unless
there is only a single slave on the 1-Wire line. The
active pullup does not apply to the rising edge of a
presence pulse or a recovery after a short on the
1-Wire line.
The circuit that controls rising edges (Figure 2) oper-
ates as follows: At t1, the pulldown (from DS2482-100
or 1-Wire slave) ends. From this point on, the 1-Wire
bus is pulled high through RWPU internal to the
DS2482-100. VCC and the capacitive load of the 1-Wire
line determine the slope. In case that active pullup is
disabled (APU = 0), the resistive pullup continues, as
represented by the solid line. With active pullup
enabled (APU = 1), and when at t2 the voltage has
reached a level between VIL1(MAX) and VIH1(MIN), the
DS2482-100 actively pulls the 1-Wire line high, applying
a controlled slew rate as represented by the dashed
line. The active pullup continues until tAPUOT is expired
at t3. From that time on the resistive pullup continues.
See the
Strong Pullup (SPU) section for a way to keep
the pullup transistor conducting beyond t3.
DS2482-100
6
Maxim Integrated
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