參數(shù)資料
型號: DS21Q42TN
廠商: DALLAS SEMICONDUCTOR
元件分類: Digital Transmission Controller
英文描述: DATACOM, FRAMER, PQFP128
封裝: TQFP-128
文件頁數(shù): 3/119頁
文件大小: 1309K
代理商: DS21Q42TN
DS21Q42
100 of 119
TRANSMIT SIDE 2.048 MHz BOUNDARY TIMING (with elastic store enabled)
Figure 20-12
Notes:
1. TSER data in channels 1, 5, 9, 13, 17, 21, 25, and 29 is ignored
2. TCHBLK is programmed to block channel 31 (if the TPCSI bit is set, then the signaling data at TSIG
will be ignored).
3. TCHBLK is forced to one in the same channels as TSER is ignored (see Note 1)
4. The F-bit position (MSB position of channel 1) for the T1 frame is sampled and passed through the
transmit side elastic store (normally the transmit side formatter overwrites the F-bit position unless
the formatter is programmed to pass-through the F-bit position)
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