參數(shù)資料
型號: DS21352LN
廠商: Maxim Integrated Products
文件頁數(shù): 80/137頁
文件大?。?/td> 0K
描述: IC TXRX T1 1-CHIP 3.3V 100-LQFP
產(chǎn)品培訓模塊: Lead (SnPb) Finish for COTS
產(chǎn)品變化通告: Product Discontinuation 20/Feb/2012
標準包裝: 90
功能: 單芯片收發(fā)器
接口: HDLC,T1
電路數(shù): 1
電源電壓: 3.14 V ~ 3.47 V
電流 - 電源: 75mA
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應商設備封裝: 100-LQFP(14x14)
包裝: 托盤
包括: DSX-1 和 CSU 線路補償發(fā)生器,HDLC 控制器,帶內回路代碼發(fā)生器和檢測器
DS21352/DS21552
47 of 137
Table 7-2 ALARM CRITERIA
ALARM
SET CRITERIA
CLEAR CRITERIA
Blue Alarm (AIS) (see note 1
below)
when over a 3 ms window, 5 or
less zeros are received
when over a 3 ms window, 6 or more zeros are
received
Yellow Alarm (RAI)
1. D4 bit 2 mode(RCR2.2=0)
2. D4 12th F–bit mode
(RCR2.2=1; this mode is also
referred to as the “Japanese
Yellow Alarm”)
3. ESF mode
when bit 2 of 256 consecutive
channels is set to zero for at least
254 occurrences
when the 12th framing bit is set
to one for two consecutive
occurrences
when 16 consecutive patterns of
00FF appear in the FDL
when bit 2 of 256 consecutive channels is set to
zero for less than 254 occurrences
when the 12th framing bit is set to zero for two
consecutive occurrences
when 14 or less patterns of 00FF hex out of 16
possible appear in the FDL
Red Alarm (LRCL) (this alarm
is also referred to as Loss Of
Signal)
when 192 consecutive zeros are
received
when 14 or more ones out of 112 possible bit
positions are received starting with the first one
received
NOTES:
1. The definition of Blue Alarm (or Alarm Indication Signal) is an unframed all ones signal. Blue alarm detectors should be
able to operate properly in the presence of a 10E–3 error rate and they should not falsely trigger on a framed all ones signal.
The blue alarm criteria in the DS21352/552 has been set to achieve this performance. It is recommended that the RBL bit be
qualified with the RLOS bit.
2. ANSI specifications use a different nomenclature than the DS21352/552 does; the following terms are equivalent:
RBL = AIS
RCL = LOS
RLOS = LOF
RYEL = RAI
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