參數(shù)資料
型號: DS1267
廠商: Maxim Integrated Products, Inc.
元件分類: 數(shù)字電位計
英文描述: Dual Digital Potentiometer Chip(雙路數(shù)字電位器芯片)
中文描述: ±5V、雙路、數(shù)字電位器芯片
文件頁數(shù): 1/11頁
文件大小: 110K
代理商: DS1267
DS1267
Dual Digital Potentiometer Chip
DS1267
022698 1/11
FEATURES
Ultra–low power consumption, quiet, pumpless design
Two digitally controlled, 256–position potentiometers
Serial port provides means for setting and reading both
potentiometers
Resistors can be connected in series to provide
increased total resistance
14–pin DIP, 16–pin SOIC, 20–pin TSSOP packages
Resistive elements are temperature compensated to
±
0.3 LSB relative linearity
Standard resistance values:
– DS1267–10 10K
– DS1267–50 50K
– DS1267–100 100K
Temperature:
– Commercial: 0
°
C to 70
°
C
– Industrial: –40
°
C to 85
°
C
DESCRIPTION
The DS1267 consist of two digitally controlled solid–
state potentiometers. Each potentiometer is composed
of 256 resistive sections. Between each resistive sec-
tion and both ends of the potentiometer are tap points
which are accessible to the wiper. The position of the
wiper on the resistive array is set by an 8–bit value that
controls which tap point is connected to the wiper output.
Communication and control of the device is accom-
plished via a 3–wire serial port interface. This interface
allows the device wiper position to be read or written.
Both potentiometers can be connected in series (or
stacked) for an increased total resistance with the same
resolution. For multiple device–single processor envi-
ronments, the DS1267 can be cascaded or daisy
chained. This feature provides for control of multiple
devices over a single 3–wire bus.
PIN ASSIGNMENT
RST
RST
C
OUT
DQ
C
OUT
C
OUT
DNC
S
OUT
S
OUT
WO
HO
LO
S
OUT
V
CC
V
CC
NC
V
CC
DNC
1
11
10
12
13
14
2
3
4
5
6
7
8
9
15
16
VB
NC
H1
L1
W1
RST
CLK
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DNC
W0
H0
L0
DQ
VB
DNC
H1
L1
W1
CLK
DNC
DNC
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
W0
H0
L0
DQ
VB
H1
L1
W1
CLK
GND
14–Pin DIP (300 Mil)
Section
See Mech. Drawings
Section
20–Pin TSSOP (173 Mil)
PIN DESCRIPTION
L0, L1
H0, H1
W0, W1
V
B
S
OUT
RST
DQ
CLK
C
OUT
V
CC
GND
NC
DNC
– Low End of Resistor
– High End of Resistor
– Wiper Terminal of Resistor
– Substrate Bias Voltage
– Stacked Configuration Output
– Serial Port Reset Input
– Serial Port Data Input
– Serial Port Clock Input
– Cascade Port Output
– +5 Volt Supply
– Ground
– No Internal Connection
– Do Not Connect
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