參數(shù)資料
型號: DS1265AB-70
廠商: DALLAS SEMICONDUCTOR
元件分類: Static RAM
英文描述: 1M X 8 NON-VOLATILE SRAM MODULE, 70 ns, DIP36
封裝: 0.600 INCH, DIP-36
文件頁數(shù): 2/8頁
文件大?。?/td> 142K
代理商: DS1265AB-70
DS1265Y/AB
2 of 8
102999
READ MODE
The DS1265 devices execute a read cycle whenever WE (Write Enable) is inactive (high) and CE (Chip
Enable) and OE (Output Enable) are active (low). The unique address specified by the 20 address inputs
(A0 - A19) defines which of the 1,048,576 bytes of data is accessed. Valid data will be available to the
eight data output drivers within tACC (Access Time) after the last address input signal is stable, providing
that CE and OE (Output Enable) access times are also satisfied. If OE and CE access times are not
satisfied, then data access must be measured from the later-occurring signal ( CE or OE ) and the limiting
parameter is either tCO for CE or tOE for OE rather than tACC.
WRITE MODE
The DS1265 devices execute a write cycle whenever WE and CE signals are active (low) after address
inputs are stable. The later-occurring falling edge of CE or WE will determine the start of the write cycle.
The write cycle is terminated by the earlier rising edge of CE or WE . All address inputs must be kept
valid throughout the write cycle. WE must return to the high state for a minimum recovery time (tWR)
before another cycle can be initiated. The OE control signal should be kept inactive (high) during write
cycles to avoid bus contention. However, if the output drivers are enabled ( CE and OE active) then WE
will disable the outputs in tODW from its falling edge.
DATA RETENTION MODE
The DS1265AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5 volts. The DS1265Y provides full functional capability for VCC greater than 4.5 volts and write
protects by 4.25 volts. Data is maintained in the absence of VCC without any additional support circuitry.
The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become don’t care, and all outputs become high-
impedance. As VCC falls below approximately 3.0 volts, a power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 3.0 volts,
the power switching circuit connects external VCC to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1265AB and 4.5 volts for the
DS1265Y.
FRESHNESS SEAL
Each DS1265 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level greater than VTP, the lithium
energy source is enabled for battery backup operation.
相關(guān)PDF資料
PDF描述
DS1270AB 2M X 8 NON-VOLATILE SRAM MODULE, 70 ns, PDIP36
DS1270Y 2M X 8 NON-VOLATILE SRAM MODULE, 70 ns, PDIP36
DS1270Y-100 2M X 8 NON-VOLATILE SRAM MODULE, 100 ns, PDMA36
DS1270Y-70 2M X 8 NON-VOLATILE SRAM MODULE, 70 ns, PDMA36
DS1270AB-100 2M X 8 NON-VOLATILE SRAM MODULE, 100 ns, PDMA36
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS1265AB-70+ 功能描述:NVRAM 8M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
DS1265AB-70IND 功能描述:NVRAM 8M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
DS1265AB-70-IND 制造商:未知廠家 制造商全稱:未知廠家 功能描述:NVRAM (Battery Based)
DS1265AB-70IND+ 功能描述:NVRAM 8M NV SRAM RoHS:否 制造商:Maxim Integrated 數(shù)據(jù)總線寬度:8 bit 存儲容量:1024 Kbit 組織:128 K x 8 接口類型:Parallel 訪問時間:70 ns 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 工作電流:85 mA 最大工作溫度:+ 70 C 最小工作溫度:0 C 封裝 / 箱體:EDIP 封裝:Tube
DS1265W 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V 8Mb Nonvolatile SRAM