參數(shù)資料
型號: DS-S29804
廠商: Altera Corporation
英文描述: Stratix II EP2S60 DSP Development Board
中文描述: Stratix二EP2S60 DSP開發(fā)板
文件頁數(shù): 35/52頁
文件大?。?/td> 3817K
代理商: DS-S29804
Altera Corporation
35
Preliminary
Board Components
f
For general information on CompactFlash, see
www.compactflash.org
.
Mictor Connector (J20)
The Mictor connector (J20) can be used to transmit up to 27 high-speed
I/O signals with very low noise via a shielded Mictor cable. J20 is used as
a debug port. Twenty-five of the Mictor connector signals are used as
data, and two signals are used as clock input and clock output.
Most pins on J20 connect to I/O pins on the Stratix II device (U18). For
systems that do not use the Mictor connector for debugging the Nios II
processor, any on-chip signals can be routed to I/O pins and probed at J20
via a Mictor cable. External scopes and logic analyzers can connect to J20
and analyze a large number of signals simultaneously.
f
For details on Nios II debugging products that use the Mictor connector,
see
www.altera.com
.
Figure 6
shows an example of an in-target system analyzer ISA-Nios/T
(sold separately) by First Silicon Solutions (FS2) Inc. connected to the
Mictor connector. For details see
www.fs2.com
.
Figure 6. An ISA-Nios/T Connecting to the Mictor Connector (J20)
Five
of the signals connect to both the JTAG pins on the Stratix II device
(U18) and the Stratix II device’s JTAG connector (J24). The JTAG signals
have special usage requirements. You cannot use J20 and J24 at the same
time.
Figure 7
below shows connections from the Mictor connector to the
Stratix II device.
Figure 8
shows the pin-out for J20. Unless otherwise
noted, labels indicate Stratix II device pin numbers.
BUSY
COMM
RUN
POWER
1
J25
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