
38
8Bit Single Chip Microcontroller
DMC73C167
5.5.1 Timer 1
Figure 5-5. Timer 1 Schematic Diagram
Timer 1 is a 16-bit timer that contains a 5-bit prescaler and a 16-bit decrementer. The clock
source of Timer 1 is determined by bit 5 of T1CTL0 (T1SRC, P22.5).
Writing 0 to the T1SRC bit selects the internally generated Fosc/4 clock and places the timer/
event counter in real-timer clock mode. A T1SRC bit of 1 selects the external clock source
and places the timer/event counter in event counter mode.
Bit 7 of the T1CTL0 register is the START bit for Timer 1. When 0 is written to the START
bit, the timer chain is disabled or frozen at the current count value. When 1 is written to the
START bit, regardless of whether it was previously a 0 or a 1, the prescaler and counter
decrementers are loaded with the corresponding latch values and the timer/event counter
operation begins.
When the prescaler and counter decrement through zero together, an interrupt flag is set,
and the prescaler and counter decrementers are immediately and automatically reloaded
with the corresponding latch values of the reload registers.
The interrupt level generated by Timer 1 is INT2_0. Timer 1 has a 16-bit capture latch
associated with INT1(A3) that captures the current value of the counter whenever INT1 (port
A3) is activated.
5.5.1.1 Timer 1 Control Registers
Table 5-18. P20 0114h T1MSD Timer 1 MSB Data
Bit
R
7
6
5
4
3
2
1
0
16-bit Timer 1 MSB Decrementer Value
W
16-bit Timer 1 MSB Reload Register
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Pin A1
(I/O Port A1)
Prescaler
Reload
Register
16- bit
Reload
Register
5- bit
Prescaler
Fosc/4
T1SRC
START
Capture Latch
A3 (External INT1)
Timer 1
Interrupt
(INT2_0)
Toggle Out
Normal
Port Out
Pin B0
T1OUT
16- bit
Decrementer