參數(shù)資料
型號: DM9801A
文件頁數(shù): 2/60頁
文件大小: 605K
代理商: DM9801A
DM9801A
1M Home Phoneline Network Physical Layer Single Chip Transceiver
2
Final
Version: DM9801A-DS-F01
May 30, 2001
Features
1M Home Phoneline Network physical-layer, single-
chip transceiver
Compatible with HomePNA 1M PHY specification
version 1.1 and HomePNA certification document
version 1.0
Supports the MII including the MDIO/MDC serial
management interface
Supports the GPSI including a SPI serial
management interface
Supports Link Integrity function
Smart equalizer circuit for 1M receiver
Supports Patent Pending 4-wire operation
Supports hardware or software speed select
Supports Interrupt on change, eliminates
management polling
Flexible built-in LED support for TX Activity, RX
Activity and Collision Indication or Activity, Link state
and Collision
Digital PLL circuit using advanced digital algorithm to
reduce jitter
Low-power, high-performance CMOS process
Available in a small outline 100-pin LQFP
3.3V DC power with 5V DC tolerant I/O
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