參數(shù)資料
型號: DM93L34
文件頁數(shù): 125/158頁
文件大小: 2668K
代理商: DM93L34
Functional Description
The 93L21 consists of two separate decoders each de-
signed to accept two binary weighted inputs and provide
four mutually exclusive active LOW outputs as shown in the
logic symbol. Each decoder can be used as a 4-output de-
multiplexer by using the enable as a data input.
Truth Table
(Each Decoder)
Inputs
Outputs
E
A0
A1
O0
O1
O2
O3
L
L
L
L
H
L
H
L
H
X
L
L
H
H
X
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Logic Diagram
TL/F/10197–3
Switching Characteristics
V
CC
e a
5.0V, T
A
e a
25
§
C (See Section 5 for test waveforms and output load.)
Symbol
Parameter
C
L
e
15 pF
Units
Min
Max
tPLH
tPHL
Propagation Delay
An to On
50
65
ns
tPLH
tPHL
Propagation Delay
En to On
40
52
ns
3
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