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參數(shù)資料
| 型號： | DLKPC192S |
| 英文描述： | 10Gbps Ethernet LAN Physical Coding Sublayer (PCS) Device |
| 中文描述： | 10Gbps的以太網(wǎng)物理編碼子層（PCS）設(shè)備 |
| 文件頁數(shù)： | 1/25頁 |
| 文件大?。?/td> | 360K |
| 代理商： | DLKPC192S |
!
SLLS536 – AUGUST 2002
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
10-Gbps Ethernet LAN PCS With 64b/66b
ENDEC
10-Gbps Media-Independent Interface
(XGMII) Using 2.5-V SSTL Class 2
Technology
10-Gbps 16-Bit Interface (XSBI) Using LVDS
Technology
IEEE 802.3 Management Data Interface
(MDIO)
Advanced 0.18-
μ
m CMOS Technology
Less Than 1.5 W Power Consumption
Low-Cost 289-Ball PBGA Package
description
The DLKPC192S performs all physical coding sublayer (PCS) functions for proposed IEEE 802.3ae/D2.0
10-Gbps Ethernet serial network (LAN) connections.
The DLKPC192S connects to the media access control (MAC) and all higher layers of the OSI protocol stack
via the 10-Gbps media independent interface (XGMII). The XGMII consists of two unidirectional buses, each
with 36 information bits (32 data bits, 4 control bits) plus a clock. The XGMII interface is implemented using
2.5-V, SSTL Class 2 technology. The DLKPC192S connects to physical media via the 10-Gbps 16-bit interface
(XSBI). The XSBI bus consists of two unidirectional buses, each with 16 data bits plus a clock. The XSBI
interface is implemented utilizing low-voltage differential signaling (LVDS) technology. The DLKPC192S
encodes and decodes data using the 64b/66b coding algorithm and provides clock tolerance compensation
when needed.
O/E
MAC
ASIC
16:1
TX MUX
E/O
XGMII
Clk
32
4
Clk
32
4
6”
XSBI
1:16
CDR/
Deserializer
3”
Clk
16
Clk
16
10-Gbps Ethernet
Physical
Coding Sublayer
DLKPC192S
MDIO MDC
TD[0:31]
TC
KG[0:3]
KF[0:3]
RD[0:31]
RC
TXCP/N
RXCP/N
TXD[0:15]P/N
RXD[0:15]P/N
OSC.
OSC.
RFCP/N
XBICP/N
Management
Figure 1. 10-Gbps Ethernet Short-PCB-Distance Implementation
The DLKPC192S can be used in systems where printed-circuit board (PCB) traces between the media access
control device and the serializer/deserializer device are sufficiently short, as shown in Figure 1.
Systems requiring PCB traces longer than 6 inches can be implemented by using the TLK3114SA XGMII
external sublayer device to increase the allowable PCB trace length to greater than 20 inches, as shown in
Figure 2.
Copyright
2002, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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