參數(shù)資料
型號: DEMO56F8014
廠商: Freescale Semiconductor
文件頁數(shù): 75/124頁
文件大?。?/td> 0K
描述: BOARD DEMO MC56F8014 W/US PS
標準包裝: 1
類型: MCU
適用于相關(guān)產(chǎn)品: 56F8014
所含物品: 板,線纜,CD,電源
配用: APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM
相關(guān)產(chǎn)品: MC56F8014VFAE-ND - IC DIGITAL SIGNAL CTRLR 32-LQFP
56F8014 Technical Data, Rev. 11
54
Freescale Semiconductor
5.5.4.4
Timer Channel 1 Interrupt Priority Level (TMR_1 IPL)—Bits 9–8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.4.5
Timer Channel 0 Interrupt Priority Level (TMR_0 IPL)—Bits 7–6
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.4.6
I2C Address Detect Interrupt Priority Level (I2C_ADDR IPL)—Bits 5–4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
5.5.4.7
Reserved—Bits 3–0
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.5.5
Interrupt Priority Register 4 (IPR4)
Figure 5-7 Interrupt Priority Register 4 (IPR4)
5.5.5.1
Reserved—Bits 15–8
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
Base + $4
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
PWM_F IPL
PWM_RL IPL
ADC_ZC_LE
IPL
ADCB_CC
IPL
Write
RESET
0000000
000
0
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