參數(shù)資料
型號(hào)： DEMO56F8014
廠商： Freescale Semiconductor
文件頁數(shù)： 64/124頁
文件大?。?/td> 0K
描述： BOARD DEMO MC56F8014 W/US PS
標(biāo)準(zhǔn)包裝： 1
類型： MCU
適用于相關(guān)產(chǎn)品： 56F8014
所含物品： 板，線纜，CD，電源
配用： APMOTOR56F8000E-ND - KIT DEMO MOTOR CTRL SYSTEM
相關(guān)產(chǎn)品： MC56F8014VFAE-ND - IC DIGITAL SIGNAL CTRLR 32-LQFP
56F8014 Technical Data, Rev. 11
44
Freescale Semiconductor
restart the clocks and service the IRQ. An IRQ can only wake the core if the IRQ is enabled prior to
entering wait or stop mode.
5.3.1
Normal Interrupt Handling
Once the INTC has determined that an interrupt is to be serviced and which interrupt has the highest
priority, an interrupt vector address is generated. Normal interrupt handling concatenates the Vector Base
Address (VBA) and the vector number to determine the vector address, generating an offset into the vector
table for each interrupt.
5.3.2
Interrupt Nesting
Interrupt exceptions may be nested to allow an IRQ of higher priority than the current exception to be
serviced. The following table defines the nesting requirements for each priority level.
5.3.3
Fast Interrupt Handling
Fast interrupts are described in the DSP56800E Reference Manual. The interrupt controller recognizes
Fast Interrupts before the core does.
A Fast Interrupt is defined (to the ITCN) by:
1. Setting the priority of the interrupt as level 2, with the appropriate field in the IPR registers
2. Setting the FIMn register to the appropriate vector number
3. Setting the FIVALn and FIVAHn registers with the address of the code for the
Fast Interrupt
When an interrupt occurs, its vector number is compared with the FIM0 and FIM1 register values. If a
match occurs, and it is a level 2 interrupt, the ITCN handles it as a Fast Interrupt. The ITCN takes the vector
address from the appropriate FIVALn and FIVAHn registers, instead of generating an address that is an
offset from the VBA.
The core then fetches the instruction from the indicated vector adddress and if it is not a JSR, the core starts
its Fast Interrupt handling.
Table 5-1 Interrupt Mask Bit Definition
SR[9]
SR[8]
Exceptions Permitted
Exceptions Masked
0
Priorities 0, 1, 2, 3
None
0
1
Priorities 1, 2, 3
Priority 0
1
0
Priorities 2, 3
Priorities 0, 1
1
Priority 3
Priorities 0, 1, 2
相關(guān)PDF資料
PDF描述
VE-BTR-EY-F2 CONVERTER MOD DC/DC 7.5V 50W
VE-BTR-EY-F1 CONVERTER MOD DC/DC 7.5V 50W
VE-BTR-EX-S CONVERTER MOD DC/DC 7.5V 75W
VE-BTR-EW-S CONVERTER MOD DC/DC 7.5V 100W
VE-BTM-EY-F4 CONVERTER MOD DC/DC 10V 50W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DEMO56F8014-E 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8014 BD W/UNIV PS RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
DEMO56F8014-EE 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8014 BD W/UNIV PS RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評(píng)估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
DEMO90121DA 功能描述:KIT DEMO RFID DOOR ACCESS RoHS:是 類別:RF/IF 和 RFID >> 過時(shí)/停產(chǎn)零件編號(hào) 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:用于 200/300 系列的歐盟開發(fā)套件 適用于相關(guān)產(chǎn)品:Zensys RF 模塊 所含物品:開發(fā)板，模塊，編程器，軟件，線纜，電源 其它名稱:703-1019Q3225667
DEMO90121LR 功能描述:KIT DEMO LONG RANGE READER RoHS:是 類別:RF/IF 和 RFID >> RFID 評(píng)估和開發(fā)套件及電路板 系列:- 產(chǎn)品培訓(xùn)模塊:M24LR64 Dual Interface EEPROM 標(biāo)準(zhǔn)包裝:1 系列:- 類型:讀取器模塊 頻率:13.56MHz 適用于相關(guān)產(chǎn)品:M24LR-64-R 已供物品:2 根基準(zhǔn)天線，I2C 和 RFID 讀取器，樣品 其它名稱:497-10480
DEMO908AP64 功能描述:開發(fā)板和工具包 - S08 / S12 MC68HC908AP64 DEMO BRD RoHS:否 產(chǎn)品:Development Kits 工具用于評(píng)估:MC9S12G128 核心:S12 接口類型:CAN, LIN, RS-232, USB 工作電源電壓:5 V 制造商:Freescale Semiconductor
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