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參數(shù)資料
| 型號： | DEM-VSP2262Y |
| 英文描述： | CCD SIGNAL PROCESSOR for DIGITAL CAMERAS |
| 中文描述： | CCD信號處理器的數(shù)碼相機(jī) |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 224K |
| 代理商： | DEM-VSP2262Y |
FEATURES
G
CCD SIGNAL PROCESSING:
Correlated Double Sampling (CDS)
Programmable Black Level Clamping
G
PROGRAMMABLE GAIN AMPLIFIER (PGA):
–6dB to +42dB Gain Ranging
G
12-BIT DIGITAL DATA OUTPUT:
Up to 20MHz Conversion Rate
No Missing Codes
G
79dB SIGNAL-TO-NOISE RATIO
G
PORTABLE OPERATION:
Low Voltage: 2.7V to 3.6V
Low Power: 83mW (typ) at 3.0V
Stand-By Mode: 6mW
VSP2262
Copyright 2000, Texas Instruments Incorporated
SBMS011
Printed in U.S.A. November, 2000
CCD SIGNAL PROCESSOR for
DIGITAL CAMERAS
DESCRIPTION
The VSP2262 is a complete mixed-signal processing
IC for digital cameras, providing signal conditioning
and Analog-to-Digital (A/D) conversion for the output
of a CCD array. The primary CCD channel provides
Correlated Double Sampling (CDS) to extract video
information from the pixels, –6dB to +42dB gain
range with digital control for varying illumination
conditions, and black level clamping for an accurate
black level reference. Input signal clamping and offset
correction of the input CDS are also performed. The
stable gain control is linear in dB. Additionally, the
black level is quickly recovered after gain change. The
VSP2262Y is available in an LQFP-48 package and
operates from a single +3V/+3.3V supply.
www.ti.com
Programmable
Gain
Amplifier
(PGA)
Input
Clamp
Reference Voltage Generator
Preblanking
Timing
Control
Serial Interface
Output
Latch
Correlated
Double
Sampling
(CDS)
Analog-
to-
Digital
Converter
12-Bit
Digital
Output
–6dB
to
+42dB
CCDIN
CCD
Output
Signal
PBLK
Optical Black (OB)
Level Clamping
COB
CLPOB
SHP
CLPDM
SHD
SLOAD
SCLK SDATA
V
CC
RESET
DRV
DD
ADCCK
BYPP2
BYP
BYPM
REFN
CM
REFP
DRVGND
GNDA
B[11:0]
VSP2262
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| DEM-XTR501C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DEM-XTR501C - DISCONTINUED PRODUCT. No longer recommended for new design. |
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