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參數(shù)資料
| 型號(hào)： | DAC3550A |
| 廠商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分類： | DAC |
| 英文描述： | ECONOLINE: RSZ/P - 1kVDC |
| 中文描述： | 32-BIT DAC, PQFP44 |
| 封裝： | METRIC, PLASTIC, QFP-44 |
| 文件頁(yè)數(shù)： | 3/35頁(yè) |
| 文件大?。?/td> | 626K |
| 代理商： | DAC3550A |
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DAC 3550A
Micronas
3
Stereo Audio DAC
1. Introduction
The DAC 3550A is a single-chip, high-precision, dual
digital-to-analog converter designed for audio applica-
tions. The employed conversion technique is based on
oversampling with noise-shaping.
With Micronas’ unique multibit sigma-delta technique,
less sensitivity to clock jitter, high linearity, and a supe-
rior S/N ratio has been achieved. The DAC 3550A is
controlled via I
2
C bus.
Digital audio input data is received by a versatile I
2
S
interface. The analog back-end consists of internal
analog filters and op amps for cost-effective additional
external sound processing. The DAC 3550A provides
line-out, headphone/speaker amplifiers, and volume
control. Moreover, mixing additional analog audio
sources to the D/A-converted signal is supported.
The DAC 3550A is designed for all kinds of applica-
tions in the audio and multimedia field, such as:
MPEG players, CD players, DVD players, CD-ROM
players, etc. The DAC 3550A ideally complements the
MPEG 1/2 layer 2/3 audio decoder MAS 3507D.
No crystal required for standard applications with
sample rates from 32 to 48 kHz.
Crystal required
only for automatic sample rate detection below 32 kHz,
MPEG mode (refer to Section 2.10), and use of clock
output CLKOUT.
1.1. Main Features
– no master main input clock required
– integrated stereo headphone amplifier and mono
speaker amplifier
– SNR of 103 dBA
– I
2
C bus, I
2
S bus
– internal clock oscillator
– full-feature mode by I
2
C control (three selectable
subaddresses)
– reduced feature mode for non-I
2
C applications
– continuous sample rates from 8 kHz to 50 kHz
– analog deemphasis for 44.1 kHz
– analog volume and balance: +18…
75 dB and mute
– oversampling and multibit noise-shaping technique
– THD better than 0.01 %
– two additional analog stereo inputs (AUX) with
source selection and mixing
– supply range: 2.7 V…5.5 V
– low-power mode
– additional line-out
– on-chip op amps for cost-effective external analog
sound processing
Fig. 1–1:
Block diagram of the DAC 3550A
Fig. 1–2:
Typical application: MPEG Layer 3 Player
WSI
CLI
DRI
OUTL
OUTR
Inter-
polation
Filter
DAC
Input
Select
and
Mixing
Volume
and
Headphone
Amplifier
I
2
S
Analog Inputs
MAS
3507D
ROM, CD-ROM,
RAM, Flash Mem. ..
DAC
3550A
Host
(PC, Controller)
I
2
S
line out
demand signal
MPEG clock
MPEG bit stream
CLKOUT
14.725 MHz
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