參數(shù)資料
型號: DAC3550A
廠商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分類: DAC
英文描述: ECONOLINE: RSZ/P - 1kVDC
中文描述: 32-BIT DAC, PQFP44
封裝: METRIC, PLASTIC, QFP-44
文件頁數(shù): 13/35頁
文件大小: 626K
代理商: DAC3550A
DAC 3550A
Micronas
13
3.3.4. Other Pins
TESTEN (27)
Test enable. This pin is for test purposes only and must
always be connected to VSS.
PORQ (26)
This pin may be used to reset the chip. If not used, this
pin must be connected to VDD.
DEEML (34)
DEEMR (35)
These pins connect an external analog deemphasis
network to the signal path in the analog back-end. This
connection can be switched on and off by an internal
switch which is controlled either by I
2
C or the
DEECTRL-pin.
DEECTRL (21)
If no I
2
C-control is used, deemphasis can be switched
on and off with this pin.
MCS1 (19)
MCS2 (20)
Mode select pins to select MPEG, Standard Mode, and
I
2
C subaddress.
3.4. Pin Configuration
Fig. 3
2:
44-pin PMQFP package
34
35
36
37
38
39
40
41
42
43
44
22
21
20
19
18
17
16
15
14
13
12
1
2
3
4
5
6
7
8
9
10 11
33 32 31 30 29 28 27 26 25 24 23
DEEML
DEEMR
NC
FOUTL
FOPL
FINL
NC
FOUTR
FOPR
FINR
VREF
NC
DEECTRL
MCS2
MCS1
VDD
VSS
SDA
SCL
CLKOUT
XTO
XTI
AUX1R
AUX1L
AUX2R
AUX2L
NC
NC
TESTEN
PORQ
WSI
DAI
CLI
AVSS1
AVSS0
NC
OUTL
NC
AGNDC
OUTR
NC
AVDD0
AVDD1
NC
DAC 3550A
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