參數(shù)資料
型號(hào)： DA28F016XS15
廠商： Intel Corp.
英文描述： 16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
中文描述： 16兆位（1兆比特× 16，2兆比特× 8）同步閃存
文件頁(yè)數(shù)： 40/63頁(yè)
文件大?。?/td> 635K
代理商： DA28F016XS15
28F016SV FlashFile MEMORY
E
40
NOTES:
1. See AC Input/Output Reference Waveforms for timing measurements, Figures 7 and 8.
2. OE# may be delayed up to t
ELQV
-t
GLQV
after the falling edge of CE#, without impacting t
ELQV
.
3. Sampled, not 100% tested. Guaranteed by design
4. This timing parameter is used to latch the correct BSR data onto the outputs.
5. Device speeds are defined as:
65/70 ns at V
CC
= 5V equivalent to
75 ns at V
CC
= 3.3V
70/80 ns at V
CC
= 5V equivalent to
120 ns at V
CC
= 3.3V
6. See the high speed AC Input/Output Reference Waveforms and AC Testing Load Circuit.
7. See the standard AC Input/Output Reference Waveforms and AC Testing Load Circuit.
8. CE
X
# is defined as the latter of CE
0
# or CE
1
# going low, or the first of CE
0
# or CE
1
# going high.
9.
The address setup requirement for Extended Status Register reads must only be met referenced to the falling edge of the
last control signal to become active (CE
0
#, CE
1
# or OE#). For example, if CE
0
# and CE
1
# are activated prior to OE# for
an Extended Status Register read, specification t
must be met. On the other hand, if either CE
0
# or CE
1
# (or both) are
activated after OE#, specification t
AVEL
must be referenced.
10. Page Buffer Reads only.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DA28F016XS-15 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
DA28F016XS20 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
DA28F016XS-20 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
DA28F160S5-100 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY
DA28F160S5-70 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY
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