參數(shù)資料
型號： DA28F016XS15
廠商： Intel Corp.
英文描述： 16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
中文描述： 16兆位（1兆比特× 16，2兆比特× 8）同步閃存
文件頁數(shù)： 20/63頁
文件大?。?/td> 635K
代理商： DA28F016XS15
28F016SV FlashFile MEMORY
E
20
NOTES:
1. RA can be the GSR address or any BSR address. See Figures 4 and 5 for Extended Status Register memory maps.
2. Upon device power-up, all BSR lock-bits come up locked. The Upload Status Bits command must be written to reflect the
actual lock-bit status.
3. A
0
is automatically complemented to load second byte of data. BYTE# must be at V
IL
.
A
0
value determines which WD/BC is supplied first: A
0
= 0 looks at the WDL/BCL, A
0
= 1 looks at the WDH/BCH.
4. BCH/WCH must be at 00H for this product because of the 256-byte (128-word) Page Buffer size, and to avoid writing the
Page Buffer contents to more than one 256-byte segment within an array block. They are simply shown for future Page
Buffer expandability.
5. In x16 mode, only the lower byte DQ
0
–7
is used for WCL and WCH. The upper byte DQ
8–15
is a don’t care.
6. PBA and PD (whose count is given in cycles 2 and 3) are supplied starting in the fourth cycle, which is not shown.
7. This command allows the user to swap between available Page Buffers (0 or 1).
8. These commands reconfigure RY/BY# output to one of three pulse-modes or enable and disable the RY/BY# function.
9. Program address, PA, is the Destination address in the flash array which must match the Source address in the Page
Buffer. Refer to the 16-Mbit Flash Product Family User’s Manual
.
10. BCL = 00H corresponds to a byte count of 1. Similarly, WCL = 00H corresponds to a word count of 1.
11. After writing the Upload Device Information command and the Confirm command, the following information is output at
Page Buffer addresses specified below:
Address
06H, 07H (Byte Mode)
03H (Word Mode)
1EH (Byte Mode)
0FH (DQ
)(Word Mode)
1FH (Byte Mode)
0FH (DQ
8
–15
)(Word Mode)
Information
Device Revision Number
Device Revision Number
Device Configuration Code
Device Configuration Code
Device Proliferation Code (01H)
Device Proliferation Code (01H)
A page buffer swap followed by a page buffer read sequence is necessary to access this information. The contents of all
other Page Buffer locations, after the Upload Device Information command is written, are reserved for future implementation
by Intel Corporation. See Section 4.8 for a description of the Device Configuration Code. This code also corresponds to
data written to the 28F016SV after writing the RY/BY# Reconfiguration command.
12.
To ensure that the 28F016SV’s power consumption during sleep mode reaches the deep power-down current level, the
system also needs to de-select the chip by taking either or both CE
0
# or CE
1
# high.
13. The upper byte of the data bus (DQ
8
–15
) during command writes is a
“Don’t Care” in x16 operation of the device.
相關(guān)PDF資料
PDF描述
DA28F320J5-120 StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT
DA28F640J5-150 StrataFlash MEMORY TECHNOLOGY 32 AND 64 MBIT
DA28F320S5-110 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor
DA28F320S5-90 16 Characters x 2 Lines, 5x7 Dot Matrix Character and Cursor
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DA28F016XS-15 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
DA28F016XS20 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
DA28F016XS-20 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:16-MBIT (1 MBIT x 16, 2 MBIT x 8) SYNCHRONOUS FLASH MEMORY
DA28F160S5-100 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY
DA28F160S5-70 制造商:INTEL 制造商全稱:Intel Corporation 功能描述:WORD-WIDE FlashFile MEMORY FAMILY
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