參數(shù)資料
型號(hào): CYW2331
廠商: Cypress Semiconductor Corp.
英文描述: Dual Serial Input PLL with 2.0-GHz and 600-MHz Prescalers
中文描述: 雙串行輸入鎖相環(huán)2.0千兆赫和600兆赫預(yù)分頻器
文件頁(yè)數(shù): 8/12頁(yè)
文件大?。?/td> 259K
代理商: CYW2331
CYW2331
PRELIMINARY
8
Document #: 38-00967-**
Table 4. 7-Bit Swallow Counter (A) Truth Table
[8]
Divide Ratio A
PLL1 (High Frequency)
0
1
:::
126
127
PLL2 (Low Frequency)
0
1
:::
14
15
A7
A6
A5
A4
A3
A2
A1
0
0
:::
1
1
0
0
:::
1
1
0
0
:::
1
1
0
0
:::
1
1
0
0
:::
1
1
0
0
:::
1
1
0
1
:::
0
1
X
X
:::
X
X
X
X
:::
X
X
X
X
:::
X
X
0
0
:::
1
1
0
0
:::
1
1
0
0
:::
1
1
0
1
:::
0
1
Table 5. 11-Bit Programmable Counter (B) Truth Table
[9]
Divide Ratio B
B11
3
0
4
0
:::
:::
2046
1
2047
1
B10
0
0
:::
1
1
B9
0
0
:::
1
1
B8
0
0
:::
1
1
B7
0
0
:::
1
1
B6
0
0
:::
1
1
B5
0
0
:::
1
1
B4
0
0
:::
1
1
B3
0
1
:::
1
1
B2
1
0
:::
1
1
B1
1
0
:::
0
1
Table 6. 15-Bit Programmable Reference Counter (for PLL1 and PLL2) Truth Table
[9]
Divide Ratio R
R15
R14
R13
R12
3
0
0
0
0
4
0
0
0
0
:::
:::
:::
:::
:::
32766
1
1
1
1
32767
1
1
1
1
R11
0
0
:::
1
1
R10
0
0
:::
1
1
R9
0
0
:::
1
1
R8
0
0
:::
1
1
R7
0
0
:::
1
1
R6
0
0
:::
1
1
R5
0
0
:::
1
1
R4
0
0
:::
1
1
R3
0
1
:::
1
1
R2
1
0
:::
1
1
R1
1
0
:::
0
1
Ordering Information
[10]
Ordering Code
Package
Name
ZI
BCI
LFI
Package Type
Tape and Reel Option
CYW2331
20-pin Thin Shrink Small Outline Package (0.173” wide)
24-pin Chip Scale Package (3.5 mm X 4.5 mm)
20-pin Micro Lead Frame (4 mm x 4 mm)
TR
Notes:
8.
9.
B is greater than or equal to A.
Divide ratio less than 3 is prohibited. The divide ratio can be calculated using the following equation:
fvco = {(P * B) + A} * fosc / R where (A < B)
fvco: Output frequency of the external VCO.
fosc: The crystal reference oscillator frequency.
A: Preset divide ratio of the 7-bit swallow counter (0 to 127) and the 4-bit swallow counter (0 to 15).
B: Preset ratio of the 11-bit programmable counter (3 to 2047).
P: Preset divide ratio of the dual modulus prescaler.
10. Operating temperature range: –40°C to +85°C.
The divide ratio N = (P * B) + A.
R: Preset ratio of the 15-bit programmable reference counter (3 to 32767).
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