參數(shù)資料
型號(hào)： CYV15G0203TB
廠商： Cypress Semiconductor Corp.
英文描述： Independent Clock Dual HOTLink II Serializer
中文描述： 獨(dú)立的時(shí)鐘第二串行雙的HOTLink
文件頁(yè)數(shù)： 13/19頁(yè)
文件大小： 525K
代理商： CYV15G0203TB
PRELIMINARY
CYV15G0203TB
Document #: 38-02105 Rev. **
Page 13 of 19
CYV15G0203TB REFCLKx Switching Characteristics
Over the Operating Range
f
REF
REFCLKx Clock Frequency
t
REFCLK
REFCLKx Period = 1/f
REF
t
REFH
REFCLKx HIGH Time (TXRATEx = 1)(Half Rate)
REFCLKx HIGH Time (TXRATEx = 0)(Full Rate)
t
REFL
REFCLKx LOW Time (TXRATEx = 1)(Half Rate)
REFCLKx LOW Time (TXRATEx = 0)(Full Rate)
t
REFD[18]
REFCLKx Duty Cycle
t
REFR [14, 15, 16, 17]
REFCLKx Rise Time (20%–80%)
t
REFF[14, 15, 16, 17]
REFCLKx Fall Time (20%–80%)
t
TREFDS
Transmit Data Set-up Time to
REFCLKx - Full Rate (TXRATEx = 0,
TXCKSELx
=
1)
Transmit Data Set-up Time to
REFCLKx - Half Rate (TXRATEx = 1,
TXCKSELx
=
1)
t
TREFDH
Transmit Data Hold Time from REFCLKx - Full Rate (TXRATEx = 0,
TXCKSELx
=
1)
Transmit Data Hold Time from REFCLKx - Half Rate (TXRATEx = 1,
TXCKSELx
=
1)
CYV15G0203TB Bus Configuration Write Timing Characteristics
Over the Operating Range
t
DATAH
Bus Configuration Data Hold
t
DATAS
Bus Configuration Data Setup
t
WRENP
Bus Configuration WREN Pulse Width
CYV15G0203TB JTAG Test Clock Characteristics
Over the Operating Range
f
TCLK
JTAG Test Clock Frequency
t
TCLK
JTAG Test Clock Period
CYV15G0203TB Device RESET Characteristics
Over the Operating Range
t
RST
Device RESET Pulse Width
CYV15G0203TB Transmit Serial Outputs and TX PLL Characteristics
Over the Operating Range
Parameter
Description
t
B
Bit Time
t
RISE[14]
CML Output Rise Time 20
80% (CML Test Load)
19.5
6.6
5.9
2.9
[14]
5.9
2.9
[14]
30
150
51.28
MHz
ns
ns
ns
ns
ns
%
ns
ns
ns
70
2
2
2.2
1.9
ns
0.8
ns
1.5
ns
0
ns
ns
ns
10
10
20
MHz
ns
50
30
ns
Condition
Min.
5128
50
Max.
660
270
Unit
ps
ps
SPDSELx =
HIGH
SPDSELx = MID
SPDSELx =LOW
SPDSELx =
HIGH
SPDSELx = MID
SPDSELx =LOW
100
180
50
500
1000
270
ps
ps
ps
t
FALL[14]
CML Output Fall Time 80
20% (CML Test Load)
100
180
500
1000
ps
ps
PLL Characteristics
Parameter
CYV15G0203TB Transmitter PLL Characteristics
t
JTGENSD[14, 19]
Transmit Jitter Generation - SD Data Rate
t
JTGENHD[14, 19]
Transmit Jitter Generation - HD Data Rate
t
TXLOCK
Transmit PLL lock to REFCLKx±
Notes:
18. The duty cycle specification is a simultaneous condition with the t
REFH
and t
REFL
parameters. This means that at faster character rates the REFCLKx± duty
cycle cannot be as large as 30%–70%.
19. While sending BIST data at the corresponding data rate, after 10,000 histogram hits on a digital sampling oscilloscope, time referenced to REFCLKx± input.
Description
Condition
Min.
Typ.
Max.
Unit
REFCLKx = 27 MHz
REFCLKx = 148.5 MHz
200
76
ps
ps
μ
s
200
CYV15G0203TB AC Electrical Characteristics
(continued)
Parameter
Description
Min.
Max
Unit
相關(guān)PDF資料
PDF描述
CYV15G0203TB-BGC Independent Clock Dual HOTLink II Serializer
CYV15G0204RB Independent Clock Dual HOTLink II⑩ Reclocking Deserializer
CYV15G0204RB-BGC Independent Clock Dual HOTLink II⑩ Reclocking Deserializer
CYV15G0204RB-BGXC Independent Clock Dual HOTLink II⑩ Reclocking Deserializer
CYV15G0204TRB Independent Clock HOTLink II⑩ Dual Serializer and Dual Reclocking Deserializer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYV15G0203TB_07 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Independent Clock Dual HOTLink II⑩ Serializer
CYV15G0203TB_09 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Independent Clock Dual HOTLink II Serializer
CYV15G0203TB-BGC 功能描述:電信線路管理 IC 2x Indep Serializers COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類(lèi)型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYV15G0203TB-BGXC 功能描述:視頻 IC 2x Indep Serializers COM RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
CYV15G0204RB 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Independent Clock Dual HOTLink II⑩ Reclocking Deserializer
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