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參數(shù)資料
| 型號： | CYV15G0203TB |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | Independent Clock Dual HOTLink II Serializer |
| 中文描述： | 獨立的時鐘第二串行雙的HOTLink |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 525K |
| 代理商： | CYV15G0203TB |
PRELIMINARY
CYV15G0203TB
Document #: 38-02105 Rev. **
Page 12 of 19
AC Test Loads and Waveforms
CYV15G0203TB AC Electrical Characteristics
Power Supply
I
CC [10,11]
Typ.
435
Max.
530
Max Power Supply Current
REFCLKx
= MAX
REFCLKx
= 125 MHz
Commercial
mA
I
CC [10,11]
Typical Power Supply Current
Commercial
425
520
mA
CYV15G0203TB DC Electrical Characteristics
(continued)
Parameter
Description
Test Conditions
Min.
Max.
Unit
2.0V
0.8V
GND
2.0V
0.8V
80%
20%
80%
20%
R
L
(Includes fixture and
probe capacitance)
3.0V
V
th
= 1.4V
≤
270 ps
≤
270 ps
Note 13
V
th
= 1.4V
3.3V
R1
R2
R1 = 590
R2 = 435
C
L
≤
7 pF
(Includes fixture and
probe capacitance)
(a) LVTTL Output Test Load
R
L
= 100
(b) CML Output Test Load
C
L
(c) LVTTL Input Test Waveform
(d) CML/LVPECL Input Test Waveform
≤
1 ns
≤
1 ns
V
IHE
V
ILE
V
IHE
V
ILE
Note 12
Note 12
Parameter
CYV15G0203TB Transmitter LVTTL Switching Characteristics
Over the Operating Range
f
TS
TXCLKx Clock Cycle Frequency
t
TXCLK
TXCLKx Period=1/f
TS
t
TXCLKH[14]
TXCLKx HIGH Time
t
TXCLKL[14]
TXCLKx LOW Time
t
TXCLKR [14, 15, 16,
17]
Description
Min.
Max
Unit
19.5
6.66
2.2
2.2
0.2
150
51.28
MHz
ns
ns
ns
ns
TXCLKx Rise Time
1.7
TXCLKF [14, 15, 16,
17]
TXCLKx Fall Time
0.2
1.7
ns
t
TXDS
t
TXDH
f
TOS
t
TXCLKO
t
TXCLKOD
Notes:
10. Maximum I
is measured with V
CC
= MAX, T
A
= 25°C, with both channels and Serial Line Drivers enabled, sending a continuous alternating 01 pattern, and
outputs unloaded.
11.
Typical I
is measured under similar conditions except with V
= 3.3V, T
= 25°C, with both channels enabled and one Serial Line Driver per channel sending
a continuous alternating 01 pattern. The redundant outputs on each channel are powered down.
12. Cypress uses constant current (ATE) load configurations and forcing functions. This figure is for reference only.
13. The LVTTL switching threshold is 1.4V. All timing references are made relative to where the signal edges cross the threshold voltage.
14. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
15. The ratio of rise time to falling time must not vary by greater than 2:1.
16. For a given operating frequency, neither rise or fall specification can be greater than 20% of the clock-cycle period or the data sheet maximum time.
17. All transmit AC timing parameters measured with 1ns typical rise time and fall time.
Transmit Data Set-up Time to
TXCLKx
↑
(TXCKSELx
=
0)
Transmit Data Hold Time from TXCLKx
↑
(TXCKSELx
=
0)
TXCLKOx Clock Frequency = 1x or 2x REFCLKx Frequency
TXCLKOx Period=1/f
TOS
TXCLKO Duty Cycle centered at 60% HIGH time
2.2
0.8
19.5
6.66
-1.9
ns
ns
MHz
ns
ns
150
51.28
0
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PDF描述 |
|---|---|
| CYV15G0203TB-BGC | Independent Clock Dual HOTLink II Serializer |
| CYV15G0204RB | Independent Clock Dual HOTLink II⑩ Reclocking Deserializer |
| CYV15G0204RB-BGC | Independent Clock Dual HOTLink II⑩ Reclocking Deserializer |
| CYV15G0204RB-BGXC | Independent Clock Dual HOTLink II⑩ Reclocking Deserializer |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYV15G0203TB_07 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Dual HOTLink II⑩ Serializer |
| CYV15G0203TB_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Dual HOTLink II Serializer |
| CYV15G0203TB-BGC | 功能描述:電信線路管理 IC 2x Indep Serializers COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| CYV15G0203TB-BGXC | 功能描述:視頻 IC 2x Indep Serializers COM RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| CYV15G0204RB | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Dual HOTLink II⑩ Reclocking Deserializer |
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