參數(shù)資料
型號: CYV15G0101DXB
廠商: Cypress Semiconductor Corp.
英文描述: Single-channel HOTLink Transceiver
中文描述: 單通道的HOTLink收發(fā)器
文件頁數(shù): 23/39頁
文件大?。?/td> 457K
代理商: CYV15G0101DXB
CYP15G0101DXB
CYV15G0101DXB
Document #: 38-02031 Rev. *I
Page 23 of 39
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ..................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential...............–0.5V to +3.8V
DC Voltage Applied to LVTTL Outputs
in High-Z State .......................................–0.5V to V
CC
+ 0.5V
Output Current into LVTTL Outputs (LOW)..................60 mA
DC Input Voltage....................................–0.5V to V
CC
+ 0.5V
DC Electrical Characteristics
Over the Operating Range
Static Discharge Voltage..........................................> 2000 V
(per MIL-STD-883, Method 3015)
Latch-up Current.....................................................> 200 mA
Power-up Requirements
The CYP(V)15G0101DXB requires one power-supply. The
voltage on any input or I/O pin cannot exceed the power pin
during power-up.
Operating Range
Range
Ambient Temperature
0°C to +70°C
–40°C to +85°C
V
CC
Commercial
Industrial
+3.3V ± 5%
+3.3V ± 5%
Parameter
LVTTL-compatible Outputs
V
OHT
V
OLT
I
OST
I
OZL
LVTTL-compatible Inputs
V
IHT
V
ILT
I
IHT
Description
Test Conditions
Min.
Max.
Unit
Output HIGH Voltage
Output LOW Voltage
Output Short Circuit Current
High-Z Output Leakage Current
I
OH
= 4 mA, V
CC
= Min.
I
OL
= 4 mA, V
CC
= Min.
V
OUT
= 0V
[18]
2.4
0
–20
–20
V
CC
0.4
–100
20
V
V
mA
μA
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
2.0
–0.5
V
CC
+ 0.3
0.8
1.5
+40
–1.5
-40
+200
V
V
REFCLK Input, V
IN
= V
CC
Other Inputs, V
IN
= V
CC
REFCLK Input, V
IN
= 0.0V
Other Inputs, V
IN
= 0.0V
V
IN
= V
CC
mA
μA
mA
μA
μA
I
ILT
Input LOW Current
I
IHPDT
Input HIGH Current with internal
pull-down
Input LOW Current with internal pull-up
LVDIFF Inputs: REFCLK
V
DIFF[19]
Input Differential Voltage
V
IHHP
Highest Input HIGH Voltage
V
ILLP
Lowest Input LOW voltage
V
COMREF[20]
Common Mode Range
3-Level Inputs
V
IHH
3-Level Input HIGH Voltage
V
IMM
3-Level Input MID Voltage
V
ILL
3-Level Input LOW Voltage
I
IHH
Input HIGH Current
I
IMM
Input MID Current
I
ILL
Input LOW Current
Differential CML Serial Outputs: OUT1 , OUT2
V
OHC
Output HIGH Voltage
(V
CC
referenced)
I
ILPUT
V
IN
= 0.0V
–200
μA
400
1.2
0.0
1.0
V
CC
V
CC
V
CC
/ 2
V
CC
– 1.2
mV
V
V
V
Min. V
CC
Max.
Min. V
CC
Max.
Min. V
CC
Max.
V
IN
= V
CC
V
IN
= V
CC
/2
V
IN
= GND
0.87 * V
CC
0.47 * V
CC
0.0
V
CC
V
V
V
μA
μA
μA
0.53 * V
CC
0.13 * V
CC
200
50
–200
–50
100 differential load
150 differential load
V
CC
– 0.5
V
CC
V
CC
V
CC
0.2
0.2
V
V
0.5
Notes:
18. Tested one output at a time, output shorted for less than one second, less than 10% duty cycle.
19. This is the minimum difference in voltage between the true and complement inputs required to ensure detection of a logic-1 or logic-0. A logic-1 exists when
the true (+) input is more positive than the complement ( ) input. A logic-0 exists when the complement ( ) input is more positive than true (+) input.
20. The common mode range defines the allowable range of REFCLK+ and REFCLK when REFCLK+ = REFCLK . This marks the zero-crossing between the
true and complement inputs as the signal switches between a logic-1 and a logic-0.
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