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參數(shù)資料
| 型號(hào)： | CYNSE70032-66BGI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Network Search Engine |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA272 |
| 封裝： | 27 X 27 MM, 2.33 MM HEIGHT, BGA-272 |
| 文件頁(yè)數(shù)： | 26/126頁(yè) |
| 文件大?。?/td> | 3333K |
| 代理商： | CYNSE70032-66BGI |
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CYNSE70032
Document #: 38-02042 Rev. *E
Page 26 of 126
Table 13-1.
Search Latency from Instruction to SRAM Access Cycle
Number of Devices
1 (TLSZ = 00)
1–8 (TLSZ = 01)
1–31 (TLSZ = 10)
Search latency from command to SRAM access cycle is 4 for a single device in the table with TLSZ = 00. In addition, SSV and
SSF shift further to the right for different values of HLAT as specified in
Table 13-2
.
13.2
The hardware diagram of the Search subsystem of eight devices is shown in
Figure 13-4
. The following are the parameters
programmed into the eight devices.
First seven devices (devices 0–6): CFG = 00000000, TLSZ = 01, HLAT = 010, LRAM = 0, and LDEV = 0.
Eighth device (device 7): CFG = 00000000, TLSZ = 01, HLAT = 010, LRAM = 1, and LDEV = 1.
Note
.
All eight devices must be programmed with the same values for TLSZ and HLAT. Only the last device in the table (device
number 7 in this case) must be programmed with LRAM = 1 and LDEV = 1. All other upstream devices (devices 0 through 6 in
this case) must be programmed with LRAM = 0 and LDEV = 0.
Figure 13-5
shows the timing diagram for a Search command in the 68-bit-configured table of eight devices for device number 0.
Figure 13-6
shows the timing diagram for a Search command in the 68-bit-configured table of eight devices for device number 1.
Figure 13-7
shows the timing diagram for a Search command in the 68-bit-configured table of eight devices for device number 7
(the last device in this specific table). For these timing diagrams four 68-bit searches are performed sequentially. HIT/MISS
assumptions were made as shown below in
Table 13-3
.
68-bit Search on Tables Configured as ×68 Using up to Eight CYNSE70032 Devices
Max Table Size
16K × 68 bits
128K × 68 bits
496K × 68 bits
Latency in CLK Cycles
4
5
6
Table 13-2. Shift of SSF and SSV from SADR
HLAT
000
001
010
011
100
101
110
111
Number of CLK Cycles
0
1
2
3
4
5
6
7
Table 13-3. HIT/MISS Assumption
Search Number
Device 0
Device 1
Devices 2–6
Device 7
1
2
3
4
Hit
Miss
Miss
Miss
Miss
Hit
Miss
Miss
Hit
Hit
Miss
Hit
Miss
Miss
Miss
Hit
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYNSE70032-83BGC | Network Search Engine |
| CYP15G0403DXB-BGC | Independent Clock Quad HOTLink II⑩ Transceiver |
| CYW15G0403DXB-BGXC | Independent Clock Quad HOTLink II⑩ Transceiver |
| CYW15G0403DXB-BGXI | Independent Clock Quad HOTLink II⑩ Transceiver |
| CYP15G0403DXB-BGI | Independent Clock Quad HOTLink II⑩ Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYNSE70032-83BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Network Search Engine |
| CYNSE70064-50BGC | 制造商:Cypress Semiconductor 功能描述: |
| CYNSE70064-83BGC | 制造商:Cypress Semiconductor 功能描述: |
| CYNSE70064A | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Search Engine |
| CYNSE70064A-50BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Search Engine |
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