- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379101 > CYNSE70032-66BGI (CYPRESS SEMICONDUCTOR CORP) Network Search Engine PDF資料下載
參數(shù)資料
| 型號(hào)： | CYNSE70032-66BGI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Network Search Engine |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA272 |
| 封裝： | 27 X 27 MM, 2.33 MM HEIGHT, BGA-272 |
| 文件頁數(shù)： | 114/126頁 |
| 文件大?。?/td> | 3333K |
| 代理商： | CYNSE70032-66BGI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁當(dāng)前第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁
CYNSE70032
Document #: 38-02042 Rev. *E
Page 114 of 126
16.0
Power
16.1
Proper power-up sequence is required to correctly initialize the Cypress Network Search Engines before functional access to the
device can begin. RST_L and TRST_L should be held low before the power supplies ramp-up. RST_L must be set low for a
duration of time afterward and then set high. The following steps describe the proper power-up sequence.
1. Set RST_L and TRST_L low.
2. Power up V
DD
, V
DDQ
and start running CLK2X and PHS_L. The order in which these signals (including V
DD
and V
DDQ
) are
applied is not critical.
3. Hold RST_L low for a minimum of 64 CLK2X cycles. The counting starts on the first rising edge of CLK2X when PHS_L is
high, after both V
DD
and V
DDQ
have reached their steady state voltages. Set RST_L high afterward to complete the power-up
sequence. For JTAG reset, TRST_L can be brought high after both V
DD
and V
DDQ
have reached their steady state voltages.
Figure 16-1
illustrates the proper sequences of the power-up operation
.
The Proper Power-up Sequence
17.0
Application
Figure 17-1
shows how a search engine subsystem can be formed using a host ASIC and Cypress’s CYNSE70032 bank. It also
shows how this search engine subsystem is integrated in a switch or router. The CYNSE70032 can access synchronous as well
as asynchronous SRAMs by allowing the host ASIC to set the same HLAT parameter in the all search engines within a bank of
search engines.
Figure 16-1. Power-up Sequence
VDD
VDDQ
64 CLK2x
cycles
CLK2x
PHS_L
RST_L
TRST_L
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CYNSE70032-83BGC | Network Search Engine |
| CYP15G0403DXB-BGC | Independent Clock Quad HOTLink II⑩ Transceiver |
| CYW15G0403DXB-BGXC | Independent Clock Quad HOTLink II⑩ Transceiver |
| CYW15G0403DXB-BGXI | Independent Clock Quad HOTLink II⑩ Transceiver |
| CYP15G0403DXB-BGI | Independent Clock Quad HOTLink II⑩ Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CYNSE70032-83BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Network Search Engine |
| CYNSE70064-50BGC | 制造商:Cypress Semiconductor 功能描述: |
| CYNSE70064-83BGC | 制造商:Cypress Semiconductor 功能描述: |
| CYNSE70064A | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Search Engine |
| CYNSE70064A-50BGC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Search Engine |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。