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參數(shù)資料
| 型號(hào)： | CYC1021B-12VC |
| 英文描述： | IC-1MB CMOS SRAM |
| 中文描述： | 集成電路1MB的CMOS SRAM的 |
| 文件頁(yè)數(shù)： | 5/9頁(yè) |
| 文件大?。?/td> | 308K |
| 代理商： | CYC1021B-12VC |
CY7C1021B
5
Notes:
12. Data I/O is high impedance if OE or BHE and/or BLE= V
.
13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Switching Waveforms
(continued)
Write Cycle No. 1 (CE Controlled)
1021B-7
t
HD
t
SD
t
SCE
t
SA
t
HA
t
AW
t
PWE
t
WC
BW
DATA I/O
ADDRESS
CE
WE
BHE, BLE
[12, 13]
t
Write Cycle No. 2 (BLEorBHE Controlled)
t
HD
t
SD
t
BW
t
SA
t
HA
t
AW
t
PWE
t
WC
t
SCE
DATA I/O
ADDRESS
BHE, BLE
WE
CE
1021B-8
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