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參數(shù)資料
| 型號： | CY7C63833 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設(shè)控制器) |
| 中文描述： | enCoRe II還低速USB外設(shè)控制器（enCoRe II還低速的USB外設(shè)控制器） |
| 文件頁數(shù)： | 37/74頁 |
| 文件大小： | 1441K |
| 代理商： | CY7C63833 |
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CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 37 of 74
15.2
SPI Configure Register
Table 15-2. SPI Configure Register (SPICR) [0x3D] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
Swap
LSB First
Comm Mode
CPOL
CPHA
SCLK Select
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
0
0
0
0
0
Bit 7:
Swap
0 = Swap function disabled
1 = The SPI block swaps its use of SMOSI and SMISO. Among other things, this can be useful in implementing single wire SPI-
like communications
Bit 6:
LSB First
0 = The SPI transmits and receives the MSB (Most Significant Bit) first
1 = The SPI transmits and receives the LSB (Least Significant Bit) first.
Bit [5:4]:
Comm Mode [1:0]
0 0: All SPI communication disabled
0 1: SPI master mode
1 0: SPI slave mode
1 1: Reserved
Bit 3:
CPOL
This bit controls the SPI clock (SCLK) idle polarity
0 = SCLK idles low
1 = SCLK idles high
Bit 2:
CPHA
The Clock Phase bit controls the phase of the clock on which data is sampled.
Table 15-3
below shows the timing for the various
combinations of LSB First, CPOL, and CPHA
Bit [1:0]:
SCLK Select
This field selects the speed of the master SCLK. When in master mode, SCLK is generated by dividing the base CPUCLK
Important Note for Comm Modes 01b or 10b (SPI Master or SPI Slave):
When configured for SPI, (SPI Use = 1—
Table 14-14
), the input/output direction of pins P1.3, P1.5, and P1.6 is set automati-
cally by the SPI logic. However, pin P1.4's input/output direction is NOT automatically set; it must be explicitly set by firmware.
For SPI Master mode, pin P1.4 must be configured as an output; for SPI Slave mode, pin P1.4 must be configured as an input.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C638334-LTXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C638335-LFXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C638335-LTXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C63833-LFXC | 功能描述:USB 接口集成電路 8K Flash 256 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| CY7C63833-LTXC | 功能描述:USB 接口集成電路 USB Peripheral Cntrl 8K/256 32-QFN RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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