參數(shù)資料
型號： CY7C63833
廠商： Cypress Semiconductor Corp.
英文描述： enCoRe II Low-Speed USB Peripheral Controller(enCoRe II低速USB外設控制器)
中文描述： enCoRe II還低速USB外設控制器（enCoRe II還低速的USB外設控制器）
文件頁數(shù)： 19/74頁
文件大?。?/td> 1441K
代理商： CY7C63833
CY7C63310
CY7C638xx
Document 38-08035 Rev. *I
Page 19 of 74
10.1
The enCoRe II clock selection circuitry allows the selection of
independent clocks for the CPU, USB, Interval Timers and
Capture Timers.
The CPU clock, CPUCLK, can be sourced from an external
clock or the Internal 24 MHz Oscillator. The selected clock
source can optionally be divided by 2
n
where
n
is 0-5,7 (see
Table 10-4
).
USBCLK, which must be 12 MHz for the USB SIE to function
properly, can be sourced by the Internal 24 MHz Oscillator or
an external 12 MHz/24 MHz clock. An optional divide by two
allows the use of 24 MHz source.
The Interval Timer clock (ITMRCLK), can be sourced from an
external clock, the Internal 24 MHz Oscillator, the Internal 32
KHz Low-power Oscillator, or from the timer capture clock
Clock Architecture Description
(TCAPCLK). A programmable prescaler of 1, 2, 3, 4 then
divides the selected source.
The Timer Capture clock (TCAPCLK) can be sourced from an
external clock, Internal 24 MHz Oscillator, or the Internal 32
KHz Low-power Oscillator.
The CLKOUT pin (P0.1) can be driven from one of many
sources. This is used for test and can also be used in some
applications. The sources that can drive the CLKOUT are:
CLKIN after the optional EFTB filter
Internal 24 MHz Oscillator
Internal 32 KHz Low-power Oscillator
CPUCLK after the programmable divider
Table 10-1. IOSC Trim (IOSCTR) [0x34] [R/W]
Bit #
7
6
5
4
3
2
1
0
Field
foffset[2:0]
Gain[4:0]
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
0
D
D
D
D
D
The IOSC Calibrate register is used to calibrate the internal oscillator. The reset value is undefined but during boot the SROM
writes a calibration value that is determined during manufacturing test. This value should not require change during normal use.
This is the meaning of ‘D’ in the Default field
Bit [7:5]:
foffset [2:0]
This value is used to trim the frequency of the internal oscillator. These bits are not used in factory calibration and will be zero.
Setting each of these bits causes the appropriate fine offset in oscillator frequency.
foffset bit 0 = 7.5 KHz
foffset bit 1 = 15 KHz
foffset bit 2 = 30 KHz
Bit [4:0]:
Gain [4:0]
The effective frequency change of the offset input is controlled through the gain input. A lower value of the gain setting increases
the gain of the offset input. This value sets the size of each offset step for the internal oscillator. Nominal gain change
(KHz/offsetStep) at each bit, typical conditions (24 MHz operation):
Gain bit 0 = –1.5 KHz
Gain bit 1 = –3.0 KHz
Gain bit 2 = –6 KHz
Gain bit 3 = –12 KHz
Gain bit 4 = –24 KHz
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相關代理商/技術參數(shù)
參數(shù)描述
CY7C638334-LTXC 制造商:Cypress Semiconductor 功能描述:
CY7C638335-LFXC 制造商:Cypress Semiconductor 功能描述:
CY7C638335-LTXC 制造商:Cypress Semiconductor 功能描述:
CY7C63833-LFXC 功能描述:USB 接口集成電路 8K Flash 256 byte RAM COM RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
CY7C63833-LTXC 功能描述:USB 接口集成電路 USB Peripheral Cntrl 8K/256 32-QFN RoHS:否 制造商:Cypress Semiconductor 產(chǎn)品:USB 2.0 數(shù)據(jù)速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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