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參數(shù)資料
| 型號： | CY7C4425 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 64 x 18 Synchronous FIFOs(64 x 18 同步 先進先出) |
| 中文描述： | 64 × 18（64 × 18同步先進先出同步FIFO的） |
| 文件頁數(shù)： | 13/25頁 |
| 文件大小： | 398K |
| 代理商： | CY7C4425 |
CY7C4425/4205/4215
CY7C4225/4235/4245
13
Notes:
32. Read from Last Physical Location.
33. Clocks are free running in this case.
34. The flags may change state during Retransmit as a result of the offset of the read and write pointers, but flags will be valid at t
RTR
.
35. For the synchronous PAE and PAF flags (SMODE), an appropriate clock cycle is necessary after t
RTR
to update these flags.
Switching Waveforms
(continued)
Read Expansion Out Timing
REN
WCLK
RXO
t
CLKH
t
ENS
Note
t
XO
t
XO
42X5–20
32
Write Expansion InTiming
WCLK
WXI
t
XI
t
XIS
42X5–21
Read Expansion In Timing
RCLK
RXI
t
XI
t
XIS
42X5–22
Retransmit Timing
REN/WEN
FL/RT
t
PRT
t
RTR
42X5–23
EF/FF
and all
async flags
HF/PAE/PAF
[33, 34, 35]
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| CY7C4211 | 512 x 9 Synchronous FIFOs(512x9同步先進先出（FIFO）) |
| CY7C4201 | 256 x 9 Synchronous FIFOs(256x9同步先進先出（FIFO）) |
| CY7C4221 | 1K x 9 Synchronous FIFOs(1Kx9同步先進先出（FIFO）) |
| CY7C4241 | 4K x 9 Synchronous FIFOs(4Kx9同步先進先出（FIFO）) |
| CY7C4421 | 64× 9 Synchronous FIFOs(64×9同步先進先出（FIFO）) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C4425-15AC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C4425V15ASC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C443-12JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Width Uni-Dir 2K x 9 32-Pin PLCC |
| CY7C443-14DC | 制造商:Cypress Semiconductor 功能描述:FIFO, 2K x 9, Synchronous, 28 Pin, Ceramic, DIP |
| CY7C443-14JC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Width Uni-Dir 2K x 9 32-Pin PLCC |
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