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| 型號： | CY7C43683AV |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 3.3V 16K x36 Unidirectional Synchronous FIFO w/ Bus Matching(3.3V 16K x36 單向同步先進(jìn)先出帶總線匹配) |
| 中文描述： | 3.3 16K的x36單向同步FIFO瓦特/總線匹配（3.3 16K的x36單向同步先進(jìn)先出帶總線匹配） |
| 文件頁數(shù)： | 26/28頁 |
| 文件大?。?/td> | 420K |
| 代理商： | CY7C43683AV |
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CY7C43643AV
CY7C43663AV/CY7C43683AV
26
PRELIMINARY
Table 4. FIFO Flag Operation (CY Standard and FWFT Modes)
Number of Words in FIFO Memory
[39, 40, 41, 42]
CY7C43643AV
CY7C43663AV
Synchronized to CLKA
EF/OR
Synchronized to CLKB
AF
CY7C43683AV
AE
FF/IR
0
0
0
L
L
H
H
1 TO X1
1 TO X1
1 TO X1
H
L
H
H
(X1+1) to
[1024
–
(Y1+1)]
(X1+1) to
[4096
–
(Y1+1)]
(X1+1) to
[16384
–
(Y1+1)]
H
H
H
H
(1024
–
Y1) to 1023 (4096
–
Y1) to 4095
(16384
–
Y1) to
16383
H
H
L
H
1024
4096
16384
H
H
L
L
Table 5. Data Size for FIFO Long-Word Reads
Size Mode
[43]
Data Written to FIFO2
Data Read From FIFO2
BM
SIZE
BE
A
27
–
35
A
A
18
–
26
B
A
9
–
17
C
A
0
–
8
D
B
27
–
35
A
B
18
–
26
B
B
9
–
17
C
B
0
–
8
D
L
X
X
Table 6. Data Size for Word Reads
Size Mode
[43]
Data Written to FIFO
Read No.
Data Read From FIFO
BM
SIZE
BE
A
27
–
35
A
A
18
–
26
B
A
9
–
17
C
A
0
–
8
D
B
9
–
17
A
B
0
–
8
B
H
L
H
1
2
C
D
H
L
L
A
B
C
D
1
C
D
2
A
B
Table 7. Data Size for Byte Reads from FIFO
Size Mode
[43]
Data Written to FIFO
Read No.
Data Read From
FIFO
BM
SIZE
BE
A
27
–
35
A
A
18
–
26
B
A
9
–
17
C
A
0
–
8
D
B
0
–
8
A
H
H
H
1
2
B
3
C
4
D
H
H
L
A
B
C
D
1
D
2
C
3
B
4
A
Notes:
39. X1 is the Almost Empty offset for FIFO used by AE. Y1 is the Almost Full offset for FIFO used by AF. Both X1 and Y1 are selected during a FIFO reset or Port
A programming.
40. When a word loaded to an empty FIFO is shifted to the output register, its previous FIFO memory location is free.
41. Data in the output register does not count as a
“
word in FIFO memory
”
. Since in FWFT Mode, the first word written to an empty FIFO goes unrequested to
the output register (no read operation necessary), it is not included in the FIFO memory count.
42. The OR and IR functions are active during FWFT mode; the EF and FFA functions are active in CY Standard Mode.
43. BE is selected at Master Reset; BM and SIZE must be static throughout device operation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43683AV-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V SYNC FIFO W/BUS MATCHING 16K X36 (NOT IDT COMPAT) - Bulk |
| CY7C43684-10AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43684AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 16K x 36 x 2 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V BIDIR SYNC FIFO W/ BUS MATCHING 16KX32X2 - Bulk |
| CY7C43686-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43686AV-7AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Triple Depth/Width Tri-Bus 16K x 36/16K x 18 x 2 128-Pin TQFP |
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