參數(shù)資料
型號(hào)： CY7C43664AV
廠商： Cypress Semiconductor Corp.
英文描述： 3.3V 4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(3.3V 4K x36 x2 雙向同步先進(jìn)先出帶總線匹配)
中文描述： 3.3 4K的x36 x2雙向同步FIFO瓦特/總線匹配（3.3 4K的x36 x2雙向同步先進(jìn)先出帶總線匹配）
文件頁(yè)數(shù)： 34/38頁(yè)
文件大?。?/td> 581K
代理商： CY7C43664AV
CY7C43644AV
CY7C43664AV/CY7C43684AV
34
PRELIMINARY
..
Table 1. Flag Programming
SPM
H
FS1/
SEN
H
FS0/
SD
H
MRS1
↑
X
↑
X
↑
X
↑
↑
↑
↑
↑
MRS2
X
↑
X
↑
X
↑
↑
↑
↑
↑
↑
X1 and Y1 Registers
[54]
64
X2 andY2 Registers
[55]
X
H
H
H
X
64
H
H
L
16
X
H
H
L
X
16
H
L
H
8
X
H
L
H
X
8
H
L
L
Parallel programming via Port A
Parallel programming via Port A
L
H
L
Serial programming via SD
Serial programming via SD
L
H
H
Reserved
Reserved
L
L
H
Reserved
Reserved
L
L
L
Reserved
Reserved
Table 2. Port A Enable Function
CSA
W/RA
ENA
MBA
CLKA
A
0
–
35
Outputs
In high-impedance state
Port Function
H
X
X
X
X
None
L
H
L
X
X
↑
↑
X
↑
X
↑
In high-impedance state
None
L
H
H
L
In high-impedance state
FIFO1 write
L
H
H
H
In high-impedance state
Mail1 write
L
L
L
L
Active, FIFO2 output register
None
L
L
H
L
Active, FIFO2 output register
FIFO2 read
L
L
L
H
Active, Mail2 register
None
L
L
H
H
Active, Mail2 register
Mail2 read (set MBF2 HIGH)
Table 3. Port B Enable Function
CSB
W/RB
ENB
MBB
CLKB
B
0
–
35
Outputs
In high-impedance state
Port Function
H
X
X
X
X
None
L
L
L
X
X
↑
↑
X
↑
X
↑
In high-impedance state
None
L
L
H
L
In high-impedance state
FIFO2 write
L
L
H
H
In high-impedance state
Mail2 write
L
H
L
L
Active, FIFO1 output register
None
L
H
H
L
Active, FIFO1 output register
FIFO1 read
L
H
L
H
Active, Mail1 register
None
L
H
H
H
Active, Mail1 register
Mail1 read (set MBF1 HIGH)
Notes:
54. X1 register holds the offset for AEB; Y1 register holds the offset for AFA.
55. X2 register holds the offset for AEA; Y2 register holds the offset for AFB.
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