參數(shù)資料
型號(hào)： CY7C43664
廠商： Cypress Semiconductor Corp.
英文描述： 4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(4K x36 x2 雙向同步先進(jìn)先出帶總線匹配)
中文描述： 4K的x36 x2雙向同步FIFO瓦特/總線匹配（4K的x36 x2雙向同步先進(jìn)先出帶總線匹配）
文件頁數(shù)： 34/37頁
文件大?。?/td> 581K
代理商： CY7C43664
CY7C43624
CY7C43634/CY7C43644
CY7C43664/CY7C43684
34
PRELIMINARY
Table 4. FIFO1 Flag Operation (CY Standard and FWFT modes)
Number of Words in FIFO Memory
[55, 56, 57, 58]
Synchronized to
CLKA
Synchronized to
CLKB
CY7C43624
CY7C43634
CY7C43644
CY7C43664
CY7C43684
EFB/ORB
AEB
AFA
FFA/IRA
0
0
0
0
L
L
H
H
TO X1
1 TO X1
1 TO X1
1 TO X1
1 TO X1
H
L
H
H
(X1+1) to
[256
–
(Y1+1)]
(X1+1) to
[512
–
(Y1+1)]
(X1+1) to
[1024
–
(Y1+1)]
(X1+1) to
[4096
–
(Y1+1)]
(X1+1) to
[16384
–
(Y1+1)
]
H
H
H
H
(256
–
Y1) to
255
(512
–
Y1) to
511
(1024
–
Y1) to
1023
(4096
–
Y1) to
4095
(16384
–
Y1) to
16383
H
H
L
H
256
512
1024
4096
16384
H
H
L
L
Table 5. FIFO2 Flag Operation (CY Standard and FWFT Modes)
Number of Words in FIFO Memory
[56, 57, 59, 60]
CY7C43634
CY7C43644
Synchronized to
CLKA
EFB/ORB
Synchronized to
CLKB
AFA
CY7C43624
CY7C43664
CY7C43684
AEB
FFA/IRA
0
0
0
0
L
L
H
H
TO X2
1 TO X2
1 TO X2
1 TO X2
1 TO X2
H
L
H
H
(X2+1) to
[256
–
(Y2+1)]
(X2+1) to
[512
–
(Y2+1)]
(X2+1) to
[1024
–
(Y2+1
)]
(X2+1) to
[4096
–
(Y2+1
)]
(X2+1) to
[16384
–
(Y2+
)1]
H
H
H
H
(256
–
Y2) to
255
(512
–
Y2) to
511
(1024
–
Y2) to
1023
(4096
–
Y2) to
4095
(16384
–
Y2)
to 16383
H
H
L
H
256
512
1024
4096
16384
H
H
L
L
Table 6. Data Size for Long-Word Writes to FIFO2
Size Mode
[61]
Data Written to FIFO2
Data Read From FIFO2
BM
SIZE
BE
B
27
–
35
A
B
18
–
26
B
B
9
–
17
C
B
0
–
8
D
A
27
–
35
A
A
18
–
26
B
A
9
–
17
C
A
0
–
8
D
L
X
X
Table 7. Data Size for Word Writes to FIFO2
Size Mode
[61]
Write No.
Data Written to FIFO2
Data Read From FIFO2
BM
SIZE
BE
B
9
–
17
A
B
0
–
8
B
A
27
–
35
A
A
18
–
26
B
A
9
–
17
C
A
0
–
8
D
H
L
H
1
2
C
D
H
L
L
1
C
D
A
B
C
D
2
A
B
Notes:
55. X1 is the Almost Empty offset for FIFO1 used by AEB. Y1 is the Almost Full offset for FIFO1 used by AFA. Both X1 and Y1 are selected during a FIFO1 reset
or port A programming.
56. When a word loaded to an empty FIFO is shifted to the output register, its previous FIFO memory location is free.
57. Data in the output register does not count as a
“
word in FIFO memory
”
. Since in FWFT mode, the first word written to an empty FIFO goes unrequested to
the output register (no read operation necessary), it is not included in the FIFO memory count.
58. The ORB and IRA functions are active during FWFT mode; the EFB and FFA functions are active in CY Standard mode
59. X2 is the Almost Empty offset for FIFO2 used by AEA. Y2 is the Almost Full offset for FIFO2 used by AFB. Both X2 and Y2 are selected during a FIFO2 reset
or port A programming.
60. The ORA and IRB functions are active during FWFT mode; the EFA and FFB functions are active in CY Standard mode.
61. BE is selected at Master Reset; BM and SIZE must be static throughout device operation.
相關(guān)PDF資料
PDF描述
CY7C43684 16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(16K x36 x2 雙向同步先進(jìn)先出帶總線匹配)
CY7C43636 512 x36/x18x2 Tri Bus FIFO(512 x36/x18x2 三路總線 先進(jìn)先出)
CY7C43626 256 x36/x18x2 Tri Bus FIFO(256 x36/x18x2 三路總線先進(jìn)先出)
CY7C43646 1K x36/x18x2 Tri Bus FIFO(1K x36/x18x2 三路總線 先進(jìn)先出)
CY7C43666 4K x36/x18x2 Tri Bus FIFO(4K x36/x18x2 三路總線先進(jìn)先出)
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