- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379094 > CY7C43664 (Cypress Semiconductor Corp.) 4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(4K x36 x2 雙向同步先進先出帶總線匹配) PDF資料下載
參數(shù)資料
| 型號： | CY7C43664 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 4K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(4K x36 x2 雙向同步先進先出帶總線匹配) |
| 中文描述： | 4K的x36 x2雙向同步FIFO瓦特/總線匹配（4K的x36 x2雙向同步先進先出帶總線匹配） |
| 文件頁數(shù)： | 33/37頁 |
| 文件大小： | 581K |
| 代理商： | CY7C43664 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁當前第33頁第34頁第35頁第36頁第37頁
CY7C43624
CY7C43634/CY7C43644
CY7C43664/CY7C43684
33
PRELIMINARY
.
Table 1. Flag Programming
SPM
FS1/SEN
FS0/SD
MRS1
↑
X
↑
X
↑
X
↑
↑
↑
↑
↑
MRS2
X1 and Y1 Registers
[53]
X2 and Y2 Registers
[54]
H
H
H
X
↑
X
↑
X
↑
↑
↑
↑
↑
↑
64
X
H
H
H
X
64
H
H
L
16
X
H
H
L
X
16
H
L
H
8
X
H
L
H
X
8
H
L
L
Parallel programming via Port A
Parallel programming via Port A
L
H
L
Serial programming via SD
Serial programming via SD
L
H
H
Reserved
Reserved
L
L
H
Reserved
Reserved
L
L
L
Reserved
Reserved
Table 2. Port A Enable Function
CSA
H
W/RA
X
ENA
X
MBA
X
CLKA
X
A
0
–
35
Outputs
In high-impedance state
Port Function
None
L
H
L
X
X
↑
↑
X
↑
X
↑
In high-impedance state
None
L
H
H
L
In high-impedance state
FIFO1 write
L
H
H
H
In high-impedance state
Mail1 write
L
L
L
L
Active, FIFO2 output register
None
L
L
H
L
Active, FIFO2 output register
FIFO2 read
L
L
L
H
Active, Mail2 register
None
L
L
H
H
Active, Mail2 register
Mail2 read (set MBF2 HIGH)
Table 3. Port B Enable Function
CSB
H
W/RB
X
ENB
X
MBB
X
CLKB
X
B
0
–
35
Outputs
In high-impedance state
Port Function
None
L
L
L
X
X
↑
↑
X
↑
X
↑
In high-impedance state
None
L
L
H
L
In high-impedance state
FIFO2 write
L
L
H
H
In high-impedance state
Mail2 write
L
H
L
L
Active, FIFO1 output register
None
L
H
H
L
Active, FIFO1 output register
FIFO1 read
L
H
L
H
Active, Mail1 register
None
L
H
H
H
Active, Mail1 register
Mail1 read (set MBF1 HIGH)
Notes:
53. X1 register holds the offset for AEB; Y1 register holds the offset for AFA.
54. X2 register holds the offset for AEA; Y2 register holds the offset for AFB.
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C43684 | 16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching(16K x36 x2 雙向同步先進先出帶總線匹配) |
| CY7C43636 | 512 x36/x18x2 Tri Bus FIFO(512 x36/x18x2 三路總線 先進先出) |
| CY7C43626 | 256 x36/x18x2 Tri Bus FIFO(256 x36/x18x2 三路總線先進先出) |
| CY7C43646 | 1K x36/x18x2 Tri Bus FIFO(1K x36/x18x2 三路總線 先進先出) |
| CY7C43666 | 4K x36/x18x2 Tri Bus FIFO(4K x36/x18x2 三路總線先進先出) |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43664-7AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43682-15AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43683-10AI | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43683AV-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 16K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:3.3V SYNC FIFO W/BUS MATCHING 16K X36 (NOT IDT COMPAT) - Bulk |
| CY7C43684-10AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。