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參數(shù)資料
| 型號： | CY7C43622 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 256 x36 x2 Bidirectional Synchronous FIFO(256 x36 x2 雙向同步先進先出) |
| 中文描述： | 256 x36 x2雙向同步FIFO（256 x36 x2雙向同步先進先出） |
| 文件頁數(shù)： | 22/31頁 |
| 文件大?。?/td> | 463K |
| 代理商： | CY7C43622 |
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CY7C43622
CY7C43632/CY7C43642
CY7C43662/CY7C43682
22
PRELIMINARY
Notes:
33. FIFO1 Write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO1 Read (CSB = LOW, W/RB = HIGH, MBB = LOW). Data in the FIFO1 output register has
been read from the FIFO.
34. D = Maximum FIFO Depth = 256 for the CY7C43622, 512 for the CY7C43632, 1K for the CY7C43642, 4K for the CY7C43662, and 16K for the CY7C43682.
35. t
is the minimum time between a rising CLKA edge and a rising CLKB edge for AFA to transition HIGH in the next CLKA cycle. If the time between the
rising CLKA edge and rising CLKB edge is less than t
, then AFA may transition HIGH one CLKB cycle later than shown.
36. t
is the minimum time between a rising CLKB edge and a rising CLKA edge for AFB to transition HIGH in the next CLKB cycle. If the time between
the rising CLKB edge and rising CLKA edge is less than t
SKEW2
, then AFB may transition HIGH one CLKA cycle later than shown.
Switching Waveforms
(continued)
Timing for AFA when FIFO1 is Almost Full (CY Standard and FWFT Modes)
t
PAF
t
ENH
t
ENS
t
PAF
t
ENS
t
ENH
[D
–
(Y1+1)] Words in FIFO1
(D
–
Y1)Words in FIFO1
t
SKEW2[35]
CLKA
ENA
AFA
CLKB
ENB
[31, 33, 34]
t
PAF
t
ENH
t
ENS
t
PAF
t
ENS
t
ENH
[D
–
(Y2+1)] Words in FIFO2
(D
–
Y2)Words in FIFO2
t
SKEW2[36]
CLKB
ENB
AFB
CLKA
ENA
Timing for AFB when FIFO2 is Almost Full (CY Standard and FWFT Modes)
[30, 34]
相關PDF資料 |
PDF描述 |
|---|---|
| CY7C43682 | 16K x36 x2 Bidirectional Synchronous FIFO(16K x36 x2 雙向同步先進先出) |
| CY7C43633 | 512 x36 Unidirectional Synchronous FIFO w/ Bus Matching(512 x36 單向同步先進先出帶總線匹配) |
| CY7C43623 | 256 x36 Unidirectional Synchronous FIFO w/ Bus Matching(256 x36 單向同步先進先出帶總線匹配) |
| CY7C43643 | 1K x36 Unidirectional Synchronous FIFO w/ Bus Matching(1K x36 單向同步先進先出帶總線匹配) |
| CY7C43663 | 4K x36 Unidirectional Synchronous FIFO w/ Bus Matching(4K x36 單向同步先進先出帶總線匹配) |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C43642-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Bi-Dir 1K x 36 x 2 120-Pin TQFP |
| CY7C43643-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C43643AV-10AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP |
| CY7C43643AV-15AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP |
| CY7C43643AV-7AC | 制造商:Cypress Semiconductor 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 128-Pin TQFP |
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