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參數(shù)資料
| 型號(hào)： | CY7C1475V25-100BGXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture |
| 中文描述： | 1M X 72 ZBT SRAM, 8.5 ns, PBGA209 |
| 封裝： | 14 X 22 MM, 1.76 MM HEIGHT, LEAD FREE, FBGA-209 |
| 文件頁(yè)數(shù)： | 12/32頁(yè) |
| 文件大小： | 928K |
| 代理商： | CY7C1475V25-100BGXI |
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CY7C1471V25
CY7C1473V25
CY7C1475V25
Document #: 38-05287 Rev. *I
Page 12 of 32
Truth Table for Read/Write
The read-write truth table for CY7C1471V25 follows.
[2, 3, 9]
Function
WE
H
BW
A
X
BW
B
X
BW
C
X
BW
D
X
Read
Write No bytes written
L
H
H
H
H
Write Byte A – (DQ
A
and DQP
A
)
Write Byte B – (DQ
B
and DQP
B
)
Write Byte C – (DQ
C
and DQP
C
)
Write Byte D – (DQ
D
and DQP
D
)
Write All Bytes
L
L
H
H
H
L
H
L
H
H
L
H
H
L
H
L
H
H
H
L
L
L
L
L
L
Truth Table for Read/Write
The read-write truth table for CY7C1473V25 follows.
[2, 3, 9]
Function
WE
BW
b
X
BW
a
X
Read
H
Write – No Bytes Written
L
H
H
Write Byte a – (DQ
a
and
DQP
a
)
Write Byte b – (DQ
b
and
DQP
b
)
Write Both Bytes
L
H
L
L
L
H
L
L
L
Truth Table for Read/Write
The read-write truth table for CY7C1475V25 follows.
[2, 3, 9]
Function
WE
BW
x
X
Read
H
Write – No Bytes Written
Write Byte X
(DQ
x
and
DQP
x)
Write All Bytes
L
H
L
L
L
All BW = L
Note
9. Table lists only a partial listing of the byte write combinations. Any combination of BW
X
is valid. Appropriate write is based on which byte write is active.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C1475V25-133BGI | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture |
| CY7C1475V25-133BGXI | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL⑩ Architecture |
| CY7C1475V25 | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
| CY7C1473V25 | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
| CY7C1475V33 | 72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM with NoBL Architecture(帶NoBL結(jié)構(gòu)的72-Mbit (2M x 36/4M x 18/1M x 72) Flow-Through SRAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1475V33-100AXC | 制造商:Cypress Semiconductor 功能描述:72MB (1MBX72) NOBL FLOW-THRU, 3.3V CORE, 2.5/3.3V I/O - Bulk |
| CY7C1475V33-100BGC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 72MBIT 1MX72 8.5NS 209FBGA - Bulk |
| CY7C1475V33-133BGC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC OCTAL 3.3V 72MBIT 1MX72 6.5NS 209FBGA - Bulk |
| CY7C14802BC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C14802XC | 制造商:Cypress Semiconductor 功能描述: |
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