參數(shù)資料
型號: CY7C1387D-200BZC
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
中文描述: 1M X 18 CACHE SRAM, 3 ns, PBGA165
封裝: 13 X 15 MM, 1.40 MM HEIGHT, MO-216, FBGA-165
文件頁數(shù): 15/30頁
文件大?。?/td> 974K
代理商: CY7C1387D-200BZC
CY7C1386D, CY7C1386F
CY7C1387D, CY7C1387F
Document Number: 38-05545 Rev. *E
Page 15 of 30
Identification Register Definitions
Instruction Field
CY7C1386D/CY7C1386F
(512K × 36)
CY7C1387D/CY7C1387F
(1M × 18)
Description
Revision Number (31:29)
Device Depth (28:24)
[13]
000
000
Describes the version number
01011
01011
Reserved for internal use.
Device Width (23:18) 119-BGA
101110
101110
Defines the memory type and
architecture.
Device Width (23:18) 165-FBGA
000110
000110
Defines the memory type and
architecture.
Cypress Device ID (17:12)
100101
010101
Defines the width and density.
Cypress JEDEC ID Code (11:1)
00000110100
00000110100
Allows unique identification of SRAM
vendor.
ID Register Presence Indicator (0)
1
1
Indicates the presence of an ID
register.
Scan Register Sizes
Register Name
Bit Size (x18)
Bit Size (x36)
Instruction
3
3
Bypass
1
1
ID
32
32
Boundary Scan Order (119-ball BGA package)
85
85
Boundary Scan Order (165-ball FBGA package)
89
89
Identification Codes
Instruction
Code
Description
EXTEST
000
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High-Z state.
IDCODE
001
Loads the ID register with the vendor ID code and places the register between TDI and
TDO. This operation does not affect SRAM operations.
SAMPLE Z
010
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
RESERVED
011
Do Not Use. This instruction is reserved for future use.
SAMPLE/PRELOA
D
100
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation.
RESERVED
101
Do Not Use. This instruction is reserved for future use.
RESERVED
110
Do Not Use. This instruction is reserved for future use.
BYPASS
111
Places the bypass register between TDI and TDO. This operation does not affect SRAM
operations.
Note
13.Bit #24 is 1 in the register definitions for both 2.5V and 3.3V versions of this device.
[+] Feedback
相關(guān)PDF資料
PDF描述
CY7C1387D-200BZI 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
CY7C1387D-200BZXC 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
CY7C1387D-200BZXI 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
CY7C1387D-250AXI 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
CY7C1387D-250BZI 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY7C138XC 制造商:Cypress Semiconductor 功能描述:
CY7C139-25JC 制造商:Cypress Semiconductor 功能描述:
CY7C139-25JXC 功能描述:IC SRAM 36KBIT 25NS 68PLCC RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:1,000 系列:- 格式 - 存儲器:RAM 存儲器類型:移動 SDRAM 存儲容量:256M(8Mx32) 速度:133MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.95 V 工作溫度:-40°C ~ 85°C 封裝/外殼:90-VFBGA 供應(yīng)商設(shè)備封裝:90-VFBGA(8x13) 包裝:帶卷 (TR) 其它名稱:557-1327-2
CY7C1392CV18-200BZC 功能描述:靜態(tài)隨機存取存儲器 2Mx8 1.8V DDR II SIO 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray
CY7C1392CV18-250BZC 功能描述:靜態(tài)隨機存取存儲器 2Mx8 1.8V DDR II SIO 靜態(tài)隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray