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參數(shù)資料
| 型號(hào)： | CY7C1386C |
| 廠商： | Cypress Semiconductor Corp. |
| 元件分類： | DRAM |
| 英文描述： | 18-Mb (512K x 36/1M x 18) Pipelined DCD Sync SRAM |
| 中文描述： | 18 MB的（為512k × 36/1M × 18）流水線雙氰胺同步靜態(tài)存儲(chǔ)器 |
| 文件頁(yè)數(shù)： | 25/34頁(yè) |
| 文件大?。?/td> | 554K |
| 代理商： | CY7C1386C |
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CY7C1386C
CY7C1387C
Document #: 38-05239 Rev. *B
Page 25 of 34
Switching Characteristics
Over the Operating Range
[20, 21]
Parameter
t
POWER
Clock
t
CYC
t
CH
t
CL
Output Times
t
CO
t
DOH
t
CLZ
t
CHZ
t
OEV
t
OELZ
t
OEHZ
Setup Times
t
AS
t
ADS
t
ADVS
t
WES
t
DS
t
CES
Hold Times
t
AH
t
ADH
t
ADVH
t
WEH
t
DH
t
CEH
Shaded areas contain advance information.
Description
250 MHz
Min.
1
225 MHz
Min.
1
200 MHz
Min.
1
167 MHz
Min.
1
Unit
ms
Max
Max
Max
Max
V
DD
(Typical) to the first Access
[16]
Clock Cycle Time
Clock HIGH
Clock LOW
4.0
1.7
1.7
4.4
2.0
2.0
5.0
2.0
2.0
6.0
2.2
2.2
ns
ns
ns
Data Output Valid After CLK Rise
Data Output Hold After CLK Rise
Clock to Low-Z
[17, 18, 19]
Clock to High-Z
[17, 18, 19]
OE LOW to Output Valid
OE LOW to Output Low-Z
[17, 18, 19]
OE HIGH to Output High-Z
[17, 18, 19]
2.6
2.8
3.0
3.4
ns
ns
ns
ns
ns
ns
ns
1.0
1.0
1.0
1.0
1.3
1.3
1.3
1.3
2.6
2.6
2.8
2.8
3.0
3.0
3.4
3.4
0
0
0
0
2.6
2.8
3.0
3.4
Address Set-up Before CLK Rise
ADSC, ADSP Set-up Before CLK Rise
ADV Set-up Before CLK Rise
GW, BWE, BW
X
Set-up Before CLK Rise
Data Input Set-up Before CLK Rise
Chip Enable Set-Up Before CLK Rise
1.2
1.2
1.2
1.2
1.2
1.2
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.4
1.5
1.5
1.5
1.5
1.5
1.5
ns
ns
ns
ns
ns
ns
Address Hold After CLK Rise
ADSP , ADSC Hold After CLK Rise
ADV Hold After CLK Rise
GW,BWE, BW
X
Hold After CLK Rise
Data Input Hold After CLK Rise
Chip Enable Hold After CLK Rise
0.3
0.3
0.3
0.3
0.3
0.3
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.4
0.5
0.5
0.5
0.5
0.5
0.5
ns
ns
ns
ns
ns
ns
Notes:
16.This part has a voltage regulator internally; t
POWER
is the time that the power needs to be supplied above V
DD
( minimum) initially before a read or write operation
can be initiated.
17.t
, t
,t
, and t
are specified with AC test conditions shown in part (b) of AC Test Loads. Transition is measured ± 200 mV from steady-state voltage.
18.At any given voltage and temperature, t
is less than t
and t
is less than t
to eliminate bus contention between SRAMs when sharing the same
data bus. These specifications do not imply a bus contention condition, but reflect parameters guaranteed over worst case user conditions. Device is designed
to achieve High-Z prior to Low-Z under the same system conditions
19.This parameter is sampled and not 100% tested.
20.Timing reference level is 1.5V when V
= 3.3V and is 1.25V when V
DDQ
= 2.5V.
21.Test conditions shown in (a) of AC Test Loads unless otherwise noted.
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|---|---|
| CY7C1386C-225BZC | 18-Mb (512K x 36/1M x 18) Pipelined DCD Sync SRAM |
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| CY7C1386C-167BG | 18-Mb (512K x 36/1M x 18) Pipelined DCD Sync SRAM |
| CY7C1386C-167BGC | 18-Mb (512K x 36/1M x 18) Pipelined DCD Sync SRAM |
| CY7C1386C-167BZC | 18-Mb (512K x 36/1M x 18) Pipelined DCD Sync SRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1386C-133AC | 制造商:Cypress Semiconductor 功能描述:16MB (512KX36) 3.3V SYNC-PIPE (DOUBLE CYCLE-DESELECT) SRAM - Bulk |
| CY7C1386C-167AC | 功能描述:IC SRAM 18MBIT 167MHZ 100LQFP RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:96 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:FLASH 存儲(chǔ)容量:16M（2M x 8，1M x 16） 速度:70ns 接口:并聯(lián) 電源電壓:2.65 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP 包裝:托盤 |
| CY7C1386C-167AI | 制造商:Cypress Semiconductor 功能描述:SRAM Chip Sync Single 3.3V 18M-Bit 512K x 36 3.4ns 100-Pin TQFP 制造商:Rochester Electronics LLC 功能描述:16MB (512KX36) 3.3V SYNC-PIPE (DOUBLE CYCLE-DESELECT) SRAM - Bulk |
| CY7C1386D-167AXC | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512Kx36 3.3V COM 2CD Sync PL 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| CY7C1386D-167AXCT | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 512Kx36 3.3V COM 2CD Sync PL 靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
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