參數(shù)資料
型號(hào): CY62138EV30
廠商: Cypress Semiconductor Corp.
英文描述: 2-Mbit (256K x 8) MoBL㈢ Static RAM
中文描述: 2兆位(256K × 8)的MoBL㈢靜態(tài)RAM
文件頁數(shù): 4/9頁
文件大小: 427K
代理商: CY62138EV30
CY62138EV30
MoBL
Document #: 38-05577 Rev. *A
Page 4 of 9
Data Retention Waveform
Thermal Resistance
Parameter
Description
Test Conditions
BGA
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Still Air, soldered on a 3 x 4.5 inch, four-layer
printed circuit board
72
°
C/W
Θ
JC
Thermal Resistance
(Junction to Case)
8.86
°
C/W
AC Test Loads and Waveforms
Parameters
R1
R2
R
TH
V
TH
2.50V
16667
15385
8000
1.20
3.0V
1103
1554
645
1.75
Unit
V
Data Retention Characteristics
(Over the Operating Range)
Parameter
V
DR
I
CCDR
Description
Conditions
Min.
1
Typ.
[3]
Max.
Unit
V
μ
A
V
CC
for Data Retention
Data Retention Current
V
CC
= 1V, CE > V
CC
0.2V,
V
IN
> V
CC
0.2V or V
IN
< 0.2V
0.8
3
t
CDR[7]
t
R[8]
Chip Deselect to Data Retention Time
Operation Recovery Time
0
ns
ns
t
RC
V
CC
V
CC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
OUTPUT
V
TH
Equivalent to: THéVENIN EQUIVALENT
ALL INPUT PULSES
R
TH
R1
Fall time: 1 V/ns
Rise Time: 1 V/ns
Notes:
7. Tested initially and after any design or process changes that may affect these parameters.
8. Full Device AC operation requires linear V
CC
ramp from V
DR
to V
CC(min.)
> 100
μ
s or stable at V
CC(min.)
>
100
μ
s.
1.5V
t
CDR
V
DR
> 1.5 V
DATA RETENTION MODE
t
R
CE
V
CC
V
CC
(min.)
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