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參數(shù)資料
| 型號： | CY62138CVLL-70BVI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2M (256K x 8) Static RAM |
| 中文描述： | 256K X 8 STANDARD SRAM, 70 ns, PBGA36 |
| 封裝： | 6 X 8 MM, 1 MM HEIGHT, VFBGA-36 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 234K |
| 代理商： | CY62138CVLL-70BVI |
CY62138CV25/30/33 MoBL
CY62138CV MoBL
Document #: 38-05200 Rev. *D
Page 7 of 12
Notes:
15. Data I/O is high impedance if OE = V
.
16. During this period, the I/Os are in output state and input signals should not be applied.
17. If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE HIGH, the output remains in high-impedance state.
Switching Waveforms
(continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
DATA
IN
VALID
CE
1
ADDRESS
CE
2
WE
DATA I/O
OE
NOTE 16
Write Cycle No. 1 (WE Controlled)
[11, 15, 17]
t
WC
DATA
IN
VALID
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
CE
1
ADDRESS
CE
2
WE
DATA I/O
Write Cycle No. 2 (CE
1
or CE
2
Controlled)
[11, 15, 17]
OE
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| CY62138EV30 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (256K x 8) MoBL㈢ Static RAM |
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| CY62138EV30_12 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (256 K ?? 8) MoBL Static RAM |
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