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參數(shù)資料
| 型號(hào)： | CY62138CVLL-70BVI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | DRAM |
| 英文描述： | 2M (256K x 8) Static RAM |
| 中文描述： | 256K X 8 STANDARD SRAM, 70 ns, PBGA36 |
| 封裝： | 6 X 8 MM, 1 MM HEIGHT, VFBGA-36 |
| 文件頁(yè)數(shù)： | 12/12頁(yè) |
| 文件大小： | 234K |
| 代理商： | CY62138CVLL-70BVI |
CY62138CV25/30/33 MoBL
CY62138CV MoBL
Document #: 38-05200 Rev. *D
Page 12 of 12
Document History Page
Document Title: CY62138CV25/30/33 MoBL
/CY62138CV MoBL
2M (256K x 8) Static RAM
Document Number: 38-05200
REV.
ECN NO.
Issue Date
Orig. of
Change
**
112381
02/19/02
GAV
*A
114024
04/25/02
JUI
Description of Change
New Data Sheet (advance information)
Added BV package diagram
Changed from Advance Information to Preliminary
Added Second Chip Enable
Changed from Preliminary to Final
Added new part number: CY62138CV with wider voltage (2.7V
–
3.6V)
For T
AA
= 55 ns, improved t
PWE
min. from 45 ns to 40 ns
For T
AA
= 70 ns, improved t
PWE
min. from 60 ns to 45 ns
For T
AA
= 70 ns, improved t
LZWE
min. from 5 ns to 10 ns
Improved Typ. I
CC
spec. to 7 mA (for 55 ns) and 5.5 mA (for 70 ns).
Improved Max I
CC
spec. to 15 mA (for 55 ns) and 12 mA (for 70 ns).
For T
AA
= 55 ns, improved t
LZWE
min. from 5 ns to 10 ns.
Changed upper spec. for Supply Voltage to Ground Potential to V
CCMAX
+
0.5V.
Changed upper spec for DC Voltage Applied to Ouputs in High-Z State and
DC Input Voltage to V
CC
+ 0.3V.
*B
117062
07/12/02
MGN
*C
118123
09/09/02
MGN
*D
118760
09/23/02
MGN
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相關(guān)代理商/技術(shù)參數(shù) |
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| CY62138EV30 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (256K x 8) MoBL㈢ Static RAM |
| CY62138EV30_09 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (256K x 8) MoBL Static RAM |
| CY62138EV30_11 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2 Mbit (256K x 8) MoBL Static RAM |
| CY62138EV30_1106 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (256 K x 8) MoBL Static RAM Automatic power down when deselected |
| CY62138EV30_12 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:2-Mbit (256 K ?? 8) MoBL Static RAM |
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