參數(shù)資料
型號: CY39100V208-83BGI
廠商: Cypress Semiconductor Corp.
英文描述: CPLDs at FPGA Densities
中文描述: CPLD器件在FPGA的密度
文件頁數(shù): 39/86頁
文件大?。?/td> 1235K
代理商: CY39100V208-83BGI
Delta39K ISR
CPLD Family
Document #: 38-03039 Rev. *H
Page 39 of 86
39K100
125
CY39100V208B-125NTC
CY39100V256B-125BBC
CY39100V484B-125BBC
CY39100V388B-125MGC
CY39100V676B-125MBC
CY39100V208B-125NTI
CY39100V256B-125BBI
CY39100V484B-125BBI
CY39100V208B-83NTC
CY39100V256B-83BBC
CY39100V484B-83BBC
CY39100V388B-83MGC
CY39100V676B-83MBC
CY39100V208B-83NTI
CY39100V256B-83BBI
CY39100V484B-83BBI
CY39165V208-181NTC
CY39165V484-181BBC
CY39165V388-181MGC
CY39165V676-181MBC
CY39165V208-125NTC
CY39165V484-125BBC
CY39165V388-125MGC
CY39165V676-125MBC
CY39165V208-125NTI
CY39165V484-125BBI
CY39165V208-83NTC
CY39165V484-83BBC
CY39165V388-83MGC
CY39165V676-83MBC
CY39165V208-83NTI
CY39165V484-83BBI
NT208
BB256
BB484
MG388
MB676
NT208
BB256
BB484
NT208
BB256
BB484
MG388
MB676
NT208
BB256
BB484
NT208
BB484
MG388
MB676
NT208
BB484
MG388
MB676
NT208
BB484
NT208
BB484
MG388
MB676
NT208
BB484
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
256-Lead Fine Pitch Ball Grid Array
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
388-Lead Ball Grid Array
676-Lead Fine Pitch Ball Grid Array
208-Lead Enhanced Quad Flat Pack
484-Lead Fine Pitch Ball Grid Array
Commercial
÷
÷
Industrial
83
Commercial
÷
÷
Industrial
39K165
181
Commercial
÷
÷
125
Commercial
÷
÷
Industrial
83
Commercial
÷
÷
Industrial
Delta39K Part Numbers (Ordering Information)
(continued)
Device
Speed
(MHz)
Ordering Code
Package
Name
Package Type
Self-Boot
Solution
Operating
Range
相關PDF資料
PDF描述
CY39100V208-83MBC CPLDs at FPGA Densities
CY39100V208-83MBI CPLDs at FPGA Densities
CY39100V208-83MGC CPLDs at FPGA Densities
CY39100V208-83MGI CPLDs at FPGA Densities
CY39100V208-83NI CPLDs at FPGA Densities
相關代理商/技術參數(shù)
參數(shù)描述
CY39100V208-83NC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:CPLDs at FPGA Densities
CY39100V208B-125NTC 功能描述:IC CPLD 100K GATE 208BQFP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - CPLD(復雜可編程邏輯器件) 系列:Delta 39K™ ISR™ 標準包裝:40 系列:ispMACH® 4000C 可編程類型:系統(tǒng)內可編程 最大延遲時間 tpd(1):5.0ns 電壓電源 - 內部:1.65 V ~ 1.95 V 邏輯元件/邏輯塊數(shù)目:32 宏單元數(shù):512 門數(shù):- 輸入/輸出數(shù):128 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:176-LQFP 供應商設備封裝:176-TQFP(24x24) 包裝:托盤
CY39100V208B-125NTXC 功能描述:IC CPLD 100K GATE 208BQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - CPLD(復雜可編程邏輯器件) 系列:Delta 39K™ ISR™ 標準包裝:40 系列:ispMACH® 4000C 可編程類型:系統(tǒng)內可編程 最大延遲時間 tpd(1):5.0ns 電壓電源 - 內部:1.65 V ~ 1.95 V 邏輯元件/邏輯塊數(shù)目:32 宏單元數(shù):512 門數(shù):- 輸入/輸出數(shù):128 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:176-LQFP 供應商設備封裝:176-TQFP(24x24) 包裝:托盤
CY39100V208B-200NTC 制造商:Cypress Semiconductor 功能描述: 制造商:Rochester Electronics LLC 功能描述:
CY39100V208B-200NTXC 功能描述:IC CPLD 100K GATE 208BQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - CPLD(復雜可編程邏輯器件) 系列:Delta 39K™ ISR™ 標準包裝:24 系列:CoolRunner II 可編程類型:系統(tǒng)內可編程 最大延遲時間 tpd(1):7.1ns 電壓電源 - 內部:1.7 V ~ 1.9 V 邏輯元件/邏輯塊數(shù)目:24 宏單元數(shù):384 門數(shù):9000 輸入/輸出數(shù):173 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:208-BFQFP 供應商設備封裝:208-PQFP(28x28) 包裝:托盤