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| 型號： | CY2LL842 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 4/12頁 |
| 文件大?。?/td> | 196K |
| 代理商： | CY2LL842 |
CY2LL8422
Document #: 38-07411 Rev. **
Page 4 of 12
Table 5. Receiver Electrical Characteristics Over Recommended Operating Conditions
Parameter
V
OD
~V
OD
Description
Condition
See
Figure 6
Min.
247
–
50
Typ.
340
Max.
454
50
Unit
mV
mV
Differential Output Voltage Swing
Change in differential Output Voltage
Swing between Logic States
Steady State Common-mode output
voltage
Change in Steady State Com-
mon-mode output between Logic
States
Peak to Peak Common-mode output
voltage
Supply Current
RL = 100 ohm
V
OC
(SS)
See
Figure 6
1.125
1.375
V
~V
OC
(SS)
–
50
3
50
mV
V
OC
(PP)
150
mV
I
CC
No load
RL = 100 ohm
Both Channels Disabled
s0,s1,S2, S3,
1de,2de,3DE,
4DE
s0,s1,S2, S3,
1de,2de,3DE,
4DE
20
28
50
24
mA
mA
mA
μ
A
@3.3V, F
IN
= 75 MHz
16
15
I
IH
High-Level Input Current
V
IH
= 5V
I
IL
Low-Level Input Current
V
IL
= 0.8V
5
μ
A
I
OS
Short Circuit Current
V
OY
or V
0Z
= 0V
V
OD
= 0V
V
OD
= 600 mV
V
O
= 0V or V
DD
V
DD
= 0V, V
O
= 3.6V
1A, 1B, 2A, 2B, 3A, 3B,
4A, 4B
s0,s1,S2, S3,
1de,2de,3DE, 4DE
20
20
1
1
10
mA
I
OZ
High Impedance Output Current
0.1
0.1
0.1
3
μ
A
I
O(off)
C
in
Power-Off Output Current
Input Capacitance
μ
A
pF
Control Input Capacitance
6
pF
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