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參數(shù)資料
| 型號： | CY2LL842 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大?。?/td> | 196K |
| 代理商： | CY2LL842 |
High Drive Dual 2-Channel LVDS Repeater/Mux
COMLINK SERIES
CY2LL8422
Cypress Semiconductor Corporation
Document #: 38-07411 Rev. **
3901 North First Street
San Jose
CA 95134
408-943-2600
Revised July 3, 2002
8422
Features
ANSI TIA/EIA-644-1995 Compliant
Designed for Data rates to 650 MBps = (325 MHz)
Dual 2x2
—
Low Voltage Differential Signaling with output volt-
ages of
±
350 mV into 100-ohm load version (Std)
Single 3.3V supply
Accepts
±
35 mV differential inputs
Output drivers are high impedance when disabled or
when V
DD
<1.5V
28-pin SSOP/TSSOP packages
Industrial version available
Description
The Cypress CY2LL8422 are differential line drivers and re-
ceivers that utilize Low Voltage Signaling or LVDS, to achieve
signaling rates of 650 MBps. The receiver outputs can be
switched to either or both drivers through the multiplexer con-
trol signals S2/S3. This provides flexibility in application for
either a splitter or router configuration with a single device.
The Cypress CY2LL8422 are configured as dual 2-channel
repeaters/Muxes.
The LVDS standard provides a minimum differential output
voltage of 247 mV into a 100-ohm load and receipt of as little
as 100 mV signals with up to 1V of DC offset between trans-
mitter and receiver.
A doubly terminated Bus LVDS line enables multipoint con-
figurations.
Designed for both point-to-point based-band multipoint data
transmission over controlled impedance lines.
Block Diagram
Pin Configuration
1Y
1Z
2Y
2Z
27
26
23
24
1A
1B
2A
2B
2
1
6
7
1DE
2DE
3
S0S1
5
3Y
3Z
4Y
4Z
20
19
17
16
3A
3B
4A
4B
8
9
13
14
10
12
S2S3
3DE
4DE
11
18
25
4
VDD
1Y
1Z
2DE
2Z
2Y
GND
VDD
3Z
4DE
4Y
3Y
4Z
GND
28pin TSSOP/SSOP
C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
20
19
28
27
26
25
24
23
22
21
15
16
17
18
1B
1A
S0
1DE
S1
2A
2B
3A
3B
S2
3DE
S3
4A
4B
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY2PD817 | Clocks and Buffers |
| CY2PP3115 | Clocks and Buffers |
| CY2PP318 | Clocks and Buffers |
| CY2PP3210 | Clocks and Buffers |
| CY2PP3220 | Clocks and Buffers |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY2LL8422 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY2LL843 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Clocks and Buffers |
| CY2LL843SC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:High-drive Two-Channel LVDS Repeater/Mux |
| CY2LL843SCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:High-drive Two-Channel LVDS Repeater/Mux |
| CY2LL843SI | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:High-drive Two-Channel LVDS Repeater/Mux |
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