參數(shù)資料
型號： CY29653
廠商： Cypress Semiconductor Corp.
英文描述： 3.3V 125-MHz 8-Output Zero Delay Buffer(3.3V, 125MHz, 8輸出零延遲緩沖器)
中文描述： 3.3V的125 - MHz的8路輸出零延遲緩沖器（3.3伏，125MHz的，8輸出零延遲緩沖器）
文件頁數(shù)： 3/7頁
文件大小： 212K
代理商： CY29653
CY29653
Document #: 38-07477 Rev. *C
Page 3 of 7
Absolute Maximum Conditions
Parameter
V
DD
V
DD
V
IN
V
OUT
V
TT
LU
R
PS
T
S
T
A
T
J
JC
JA
ESD
H
FIT
Description
Condition
Min.
–0.3
3.135
–0.3
–0.3
Max.
5.5
3.465
V
DD
+ 0.3
V
DD
+ 0.3
V
DD
÷
2
Unit
V
V
V
V
V
mA
mVp-p
°C
°C
°C
°C/W
°C/W
V
ppm
DC Supply Voltage
DC Operating Voltage
DC Input Voltage
DC Output Voltage
Output termination Voltage
Latch Up Immunity
Power Supply Ripple
Temperature, Storage
Temperature, Operating Ambient
Temperature, Junction
Dissipation, Junction to Case
Dissipation, Junction to Ambient
ESD Protection (Human Body Model)
Failure in Time
Functional
Relative to V
SS
Relative to V
SS
Functional
Ripple Frequency < 100 kHz
Non-functional
Functional
Functional
Functional
Functional
200
150
+150
+85
150
42
105
–65
–
2000
Manufacturing test
10
DC Parameters
(VDD = 3.3V ± 5%, TA = operating temperature range)
Parameter
V
IL
V
IH
V
PP–DC
V
CMR
V
OL
Description
Condition
Min.
–
2.0
250
1.0
–
–
2.4
–
–
–
–
–
–
12
Typ.
–
–
–
–
–
–
–
–
–
–
–
330
4
15
Max.
0.8
V
DD
+0.3
1000
V
DD
– 0.6
0.55
0.30
Unit
V
V
mV
V
V
Input Voltage, Low
Input Voltage, High
Peak-Peak Input Voltage
Common Mode Range
[4]
Output Voltage, Low
[5]
LVCMOS
LVCMOS
LVPECL
LVPECL
I
OL
= 24 mA
I
OL
= 12 mA
I
OH
= –24 mA
V
IL
= V
SS
V
IL
= V
DD
AV
DD
only
All V
DD
pins except AV
DD
Outputs loaded @ 100 MHz
V
OH
I
IL
I
IH
I
DDA
I
DDQ
I
DD
C
IN
Z
OUT
Output Voltage, High
[5]
Input Current, Low
[6]
Input Current, High
[6]
PLL Supply Current
Quiescent Supply Current
Dynamic Supply Current
Input Pin Capacitance
Output Impedance
V
μ
A
μ
A
mA
mA
mA
pF
–100
100
7
4
–
–
18
AC Parameters
(V
DD
= 3.3V ± 5%, T
A
= operating temperature range)
[3]
Parameter
f
VCO
f
in
Description
Condition
Min.
140
35
25
0
40
500
Typ.
–
–
–
–
–
–
Max.
500
125
62.5
200
60
1000
Unit
MHz
MHz
VCO Frequency
Input Frequency
÷
4 Feedback
÷
8 Feedback
Bypass mode (BYPASS# = 0)
f
refDC
V
PP
Notes:
3. AC characteristics apply for parallel output termination of 50
to V
. Parameters are guaranteed by characterization and are not 100% tested.
4. V
(DC) is the crossing point of the differential input signal. Normal operation is obtained when the crossing point is within the V
CMR
range and the input swing
is within the V
PP
(DC) specification.
5. Driving one 50
parallel terminated transmission line to a termination voltage of V
TT
. Alternatively, each output drives up to two 50
series terminated
transmission lines.
6. Inputs have pull-up or pull-down resistors that affect the input current.
Input Duty Cycle
Peak-Peak Input Voltage
%
mV
LVPECL
相關(guān)PDF資料
PDF描述
CY29774 2.5V or 3.3V, 125-MHz, 14 Output Zero Delay Buffer(2.5V/3.3V, 125MHz, 14輸出零延遲緩沖器)
CY29942AC 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
CY29942AI 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
CY29942AIT CONN SMART CARD 8PIN W/DETECT
CY29942ACT 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CY29653AC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 125-MHz 8-Output Zero Delay Buffer
CY29653ACT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 125-MHz 8-Output Zero Delay Buffer
CY29653AI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 125-MHz 8-Output Zero Delay Buffer
CY29653AIT 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:3.3V 125-MHz 8-Output Zero Delay Buffer
CY29653AXC 功能描述:鎖相環(huán) - PLL 2.5 or 3.3V 125MHz COM RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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