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參數(shù)資料
| 型號： | CY28547LFXC |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 23/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK CK505/410M INTEL 72QFN |
| 標(biāo)準(zhǔn)包裝： | 240 |
| 類型： | 時鐘/頻率發(fā)生器 |
| PLL： | 是 |
| 主要目的： | Intel CPU 服務(wù)器 |
| 輸入： | LVTTL，晶體 |
| 輸出： | HCSL，LVCMOS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:23 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 200MHz |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 72-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 72-QFN（10x10） |
| 包裝： | 托盤 |
CY28547
.......................Document #: 001-05103 Rev *B Page 8 of 24
Byte 7 Control Register 7
Bit
@Pup
Name
Description
7
0
TEST_SEL
REF/N or Tri-state Select
0 = Tri-state, 1 = REF/N Clock
6
0
TEST_MODE
Test Clock Mode Entry Control
0 = Normal operation, 1 = REF/N or Tri-state mode,
5
1
REF1
REF1 Output Drive Strength
0 = Low, 1 = High
4
1
REF0
REF0 Output Drive Strength
0 = Low, 1 = High
3
1
PCI, PCIF and SRC clock
outputs except those set to
free running
SW PCI_STP Function
0 = SW PCI_STP assert, 1= SW PCI_STP deassert
When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will
be stopped in a synchronous manner with no short pulses.
When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will
resume in a synchronous manner with no short pulses.
2
HW
FSC
FSC Reflects the value of the FSC pin sampled on power up
0 = FSC was low during VTT_PWRGD# assertion
1
HW
FSB
FSB Reflects the value of the FSB pin sampled on power up
0 = FSB was low during VTT_PWRGD# assertion
0
HW
FSA
FSA Reflects the value of the FSA pin sampled on power up
0 = FSA was low during VTT_PWRGD# assertion
Byte 8 Vendor ID
Bit
@Pup
Name
Description
7
0
Revision Code Bit 3
6
0
Revision Code Bit 2
5
1
Revision Code Bit 1
4
1
Revision Code Bit 0
3
1
Vendor ID Bit 3
2
0
Vendor ID Bit 2
1
0
Vendor ID Bit 1
0
Vendor ID Bit 0
Byte 9 Control Register 9
Bit
@Pup
Name
Description
7
0
RESERVED
RESERVED, Set = 0
6
0
RESERVED
RESERVED, Set = 0
5
0
RESERVED
4
0
RESERVED
3
0
RESERVED
2
1
48M
48-MHz Output Drive Strength
0 = Low, 1 = High
1
RESERVED
0
1
PCIF0
PCIF0 Output Drive Strength
0 = Low, 1 = High
Byte 10 Control Register 10
Bit
@Pup
Name
Description
7
0
RESERVED
6
0
RESERVED
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參數(shù)描述 |
|---|---|
| CY28547LFXCT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 CK505 Mobile System Clock RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28548ZXC | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Intel 960/965M Crest line CK505 Intg Vreg RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28548ZXCT | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 Intel 960/965M Crest line CK505 Intg Vreg RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| CY28551 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Generator for Intel, VIA, and SIS㈢ |
| CY28551-3 | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Universal Clock Generator for Intel, VIA and SIS㈢ |
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