TRFM Rise/Fall Matching
參數(shù)資料
型號(hào)： CY28410ZXCT
廠商： Silicon Laboratories Inc
文件頁(yè)數(shù)： 5/17頁(yè)
文件大小： 0K
描述： IC CLOCK CK410GRANTSDALE 56TSSOP
標(biāo)準(zhǔn)包裝： 2,000
類型： 時(shí)鐘/頻率發(fā)生器
PLL： 是
主要目的： Intel CPU 服務(wù)器
輸入： 晶體
輸出： HCSL，LVCMOS
電路數(shù)： 1
比率 - 輸入:輸出： 1:19
差分 - 輸入:輸出： 無(wú)/是
頻率 - 最大： 266MHz
電源電壓： 3.135 V ~ 3.465 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
供應(yīng)商設(shè)備封裝： 56-TSSOP
包裝： 帶卷 (TR)
其它名稱： SLCY28410ZXCT
CY28410
......................Document #: 38-07593 Rev. *C Page 13 of 17
TRFM
Rise/Fall Matching
Determined as a fraction of 2*(TR – TF)/(TR
+ TF)
–20
%
T
R
Rise Time Variation
–
125
ps
T
F
Fall Time Variation
–
125
ps
VHIGH
Voltage High
Math averages Figure 8
660
850
mV
VLOW
Voltage Low
Math averages Figure 8
–150
–
mV
VOX
Crossing Point Voltage at 0.7V Swing
250
550
mV
VOVS
Maximum Overshoot Voltage
–
VHIGH +
0.3
V
VUDS
Minimum Undershoot Voltage
–0.3
–
V
VRB
Ring Back Voltage
See Figure 8. Measure SE
–
0.2
V
SRC
TDC
SRCT and SRCC Duty Cycle
Measured at crossing point VOX
45
55
%
TPERIOD
100-MHz SRCT and SRCC Period
Measured at crossing point VOX
9.997001 10.00300
ns
TPERIODSS
100-MHz SRCT and SRCC Period,
SSC
Measured at crossing point VOX
9.997001 10.05327
ns
TPERIODAbs
100-MHz SRCT and SRCC Absolute
Period
Measured at crossing point VOX
10.12800 9.872001
ns
TPERIODSSAbs 100-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point VOX
9.872001 10.17827
ns
TSKEW
SRC Skew
Measured at crossing point VOX
–250
ps
TCCJ
SRCT/C Cycle to Cycle Jitter
Measured at crossing point VOX
–125
ps
LACC
SRCT/C Long Term Accuracy
Measured at crossing point VOX
–
300
ppm
TR / TF
SRCT and SRCC Rise and Fall Times Measured from VOL = 0.175 to VOH =
0.525V
175
1100
ps
TRFM
Rise/Fall Matching
Determined as a fraction of 2*(TR – TF)/(TR
+ TF)
–20
%
T
R
Rise Time Variation
–
125
ps
T
F
Fall Time Variation
–
125
ps
VHIGH
Voltage High
Math averages Figure 8
660
850
mV
VLOW
Voltage Low
Math averages Figure 8
–150
–
mV
VOX
Crossing Point Voltage at 0.7V Swing
250
550
mV
VOVS
Maximum Overshoot Voltage
–
VHIGH +
0.3
V
VUDS
Minimum Undershoot Voltage
–0.3
–
V
VRB
Ring Back Voltage
See Figure 8. Measure SE
–
0.2
V
PCI/PCIF
TDC
PCI Duty Cycle
Measurement at 1.5V
45
55
%
TPERIOD
Spread Disabled PCIF/PCI Period
Measurement at 1.5V
29.99100 30.00900
ns
TPERIODSS
Spread Enabled PCIF/PCI Period,
SSC
Measurement at 1.5V
29.9910
30.15980
ns
TPERIODAbs
Spread Disabled PCIF/PCI Period
Measurement at 1.5V
29.49100 30.50900
ns
TPERIODSSAbs Spread Enabled PCIF/PCI Period,
SSC
Measurement at 1.5V
29.49100 30.65980
ns
THIGH
PCIF and PCI high time
Measurement at 2.4V
11.5
–
ns
TLOW
PCIF and PCI low time
Measurement at 0.4V
11.5
–
ns
TR / TF
PCIF and PCI rise and fall times
Measured between 0.8V and 2.0V
0.5
2.0
ns
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
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