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參數(shù)資料
| 型號(hào)： | CY28326 |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | FTG for VIA PT880 Serial Chipset |
| 中文描述： | FTG的威盛PT880系列芯片組 |
| 文件頁(yè)數(shù)： | 7/23頁(yè) |
| 文件大小： | 288K |
| 代理商： | CY28326 |
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CY28326
Document #: 38-07616 Rev. *A
Page 7 of 23
Byte 4: Control Register
Bit
7
@Pup
1
Name/Pin Affected
48 MHz
Description
48 MHz Output Enable
0 = Disabled, 1 = Enabled
24_48 MHz Output Enable
0 = Disabled, 1 = Enabled
PCI5 Output Enable
0 = Disabled, 1 = Enabled
PCI4 Output Enable
0 = Disabled, 1 = Enabled
PCI3 Output Enable
0 = Disabled, 1 = Enabled
PCI2 Output Enable
0 = Disabled, 1 = Enabled
PCI1 Output Enable
0 = Disabled, 1 = Enabled
PCI0 Output Enable
0 = Disabled, 1 = Enabled
6
1
24_48 MHz
5
1
PCI5
4
1
PCI4
3
1
PCI3
2
1
PCI2
1
1
PCI1
0
1
PCI0
Byte 5: Control Register
Bit
7
@Pup
1
Name/Pin Affected
AGP2
Description
AGP2 Output Enable
0 = Disabled, 1 = Enabled
AGP1 Output Enable
0 = Disabled, 1 = Enabled
AGP0 Output Enable
0 = Disabled, 1 = Enabled
25 MHz1 Output Enable
0 = Disabled, 1 = Enabled
25 MHz0 Output Enable
0 = Disabled, 1 = Enabled
PCIF2 Output Enable
0 = Disabled, 1 = Enabled
PCIF1 Output Enable
0 = Disabled, 1 = Enabled
PCIF0 Output Enable
0 = Disabled, 1 = Enabled
6
1
AGP1
5
1
AGP10
4
1
25 MHz1
3
1
25 MHz0
2
1
PCIF2
1
1
PCIF1
0
1
PCIF0
Byte 6: Control Register
Bit
7
6
5
4
3
2
1
0
@Pup
0
0
0
0
1
0
0
0
Name/Pin Affected
Revision ID Bit 3
Revision ID Bit 2
Revision ID Bit 1
Revision ID Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Description
Revision ID Bit 3
Revision ID Bit 2
Revision ID Bit 1
Revision ID Bit 0
Vendor ID Bit 3
Vendor ID Bit 2
Vendor ID Bit 1
Vendor ID Bit 0
Byte 7: Fract Aligner Control Register
Bit
7
@Pup
1
Name/Pin Affected
PCI6
Description
PCI6 Output Enable
0 = Disabled, 1 = Enabled
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY28326OC | FTG for VIA PT880 Serial Chipset |
| CY28326OCT | FTG for VIA PT880 Serial Chipset |
| CY28326OXC | Single Pole Normally Open: 1-Form-A |
| CY28326OXCT | Single Pole Normally Open: 1-Form-A |
| CY28341-2 | Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY28326OC | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
| CY28326OCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
| CY28326OXC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY28326OXCT | 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:FTG for VIA PT880 Serial Chipset |
| CY28326SPC | 制造商:Cypress Semiconductor 功能描述: |
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