參數(shù)資料
型號: CXD3511Q
廠商: Sony Corporation
英文描述: Digital Signal Driver/Timing Generator
中文描述: 數(shù)字信號驅(qū)動器/時序發(fā)生器
文件頁數(shù): 75/79頁
文件大?。?/td> 531K
代理商: CXD3511Q
75
CXD3511Q
The detailed setting contents are described below.
(a) PG_ON (sub address: 000h)
This sets the test signal output ON/OFF.
Setting value: 1 = Test pattern output mode enabled, 0 = Normal signal output
(b) PG_R (G, B)_ON (sub address: 000h)
These set the test signal level setting ON/OFF.
Setting value: 1 = Various settings enabled, 0 = Output fixed to "0"
(c) PG_R (G, B)_SEL (sub address: 000h)
These switch the pattern and non-pattern signal levels within the effective area.
Setting value: 1 = Pattern signal level is PG_SIG1R (G, B), 0 = Pattern signal level is PG_SIG2R (G, B)
(d) PG_PAT[2:0] (sub address: 000h)
This switches the display pattern within the window area.
Setting value: See the table below.
(e) PG_STRP_SW (sub address: 001h)
(Valid only when PG_PAT[2:0] = 2h)
This switches between vertical stripe and diagonal stripe.
Setting value: 1 = Diagonal stripe, 0 = Vertical stripe
(f) PG_STAIR_SW (sub address: 001h)
(Valid only when PG_PAT[2:0] = 6h or 7h)
This switches between ramp and stair.
Setting value: 1 = Stair, 0 = Ramp
(g) PG_HST[11:1] (sub addresses: 001h and 002h)
PG_HSTP[11:1] (sub addresses: 001h and 003h)
These set the horizontal effective area in 11 bits. The area can be set in 2-dot units using the front edge of the
HDIN input as the reference. Set the "(set point
50)/2" value.
0
1
2
3
4
5
6
7
Raster
Window
Vertical stripe/diagonal stripe
Horizontal stripe
Cross hatch
Dot
Horizontal ramp/horizontal stair
Vertical ramp/vertical stair
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