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參數(shù)資料
| 型號： | CXD3511Q |
| 廠商： | Sony Corporation |
| 英文描述： | Digital Signal Driver/Timing Generator |
| 中文描述： | 數(shù)字信號驅(qū)動器/時序發(fā)生器 |
| 文件頁數(shù)： | 55/79頁 |
| 文件大?。?/td> | 531K |
| 代理商： | CXD3511Q |
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CXD3511Q
(j) DCK1, DCK1X, DCK2 and DCK2X pulse settings
(1) DCK1F[5:0], DCK1W[5:0], DCK2F[5:0] and DCK2W[5:0] (sub addresses: 01Ah to 01Dh)
These set the DCK1, DCK1X, DCK2 and DCK2X pulse phases and widths. DCK1F sets the DCK1 and
DCK1X pulse phases relative to HCK1 and HCK2 in 1-dot units, and DCK2F sets the DCK2 and DCK2X pulse
phases relative to HCK1 and HCK2 in 1-dot units. Set the "Tdck1 (2) f" value.
The DCKFINV, DCKFIX and RGT settings differ according to whether the phase is synchronized with the rising
edge of HCK1 or HCK2.
The DCK1 and DCK1X pulse width and the DCK2 and DCK2X pulse width can be set in 2-dot units by
DCK1W and DCK2W, respectively. Set the "(Tdck1 (2) W
–
2)/2" value.
Tdck1w
Tdck1f
HCK1
HCK2
DCK1
DCK1X
DCK2
DCK2X
Tdck2w
Tdck2f
(2) DCKPOL (sub address: 001h)
This setting switches the DCK1 and DCK1X, DCK2 and DCK2X output polarities. Switching this setting, inverts
the polarities each pair of DCK1 and DCK1X, DCK2 and DCK2X at once.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD3513 | Interface and Driver IC for LCD |
| CXD3513GG | Interface and Driver IC for LCD |
| CXD3536R | Digital Signal Driver/Timing Generator |
| CXD3611R | Timing Generator for Progressive Scan CCD Image Sensor |
| CXD3615R | Timing Generator for Frame Readout CCD Image Sensor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD3513 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Interface and Driver IC for LCD |
| CXD3513GG | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Interface and Driver IC for LCD |
| CXD3519 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Reference Voltage and Driver IC for LCD |
| CXD3519TQ | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Reference Voltage and Driver IC for LCD |
| CXD3521GG | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Interface and Driver IC for LCD |
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