參數(shù)資料
型號： CXD3003R
廠商： Sony Corporation
元件分類： 數(shù)字信號處理
英文描述： CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述： CD數(shù)字信號處理器，具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù)： 90/137頁
文件大?。?/td> 1361K
代理商： CXD3003R
– 90 –
CXD3003R
§4-8. Playback Speed
In the CXD3003R, the following playback modes can be selected through different combinations of XTLI, XTSL
pin, double-speed command (DSPB), VCO1 selection command (VCOSEL1), VCO1 frequency division
commands (KSL3, KSL2) and command transfer rate selector (ASHS) in CLV-N or CLV-W mode.
Mode
1
2
3
4
5
6
7
XTLI
768Fs
768Fs
768Fs
768Fs
384Fs
384Fs
384Fs
XTSL
1
1
0
0
0
0
1
DSPB
0
1
0
1
0
1
1
VCOSEL1
1
0/1
0/1
1
1
0/1
0/1
0/1
ASHS
0
0
1
1
0
0
0
Playback speed
1
×
2
×
2
×
4
×
1
×
2
×
1
×
Error correction
C1: double; C2: quadruple
C1: double; C2: double
C1: double; C2: quadruple
C1: double; C2: double
C1: double; C2: quadruple
C1: double; C2: double
C1: double; C2: double
1
Actually, the optimal value should be used together with KSL3 and KSL2.
The playback speed can be varied by setting VP0 to 7 in CAV-W mode. See "§3. Description of Modes" for
details.
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