參數(shù)資料
型號： CXD3003R
廠商： Sony Corporation
元件分類： 數(shù)字信號處理
英文描述： CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述： CD數(shù)字信號處理器，具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù)： 129/137頁
文件大?。?/td> 1361K
代理商： CXD3003R
– 129 –
CXD3003R
TRK Servo Gain Up 2 fs = 88.2kHz
K3B
K3A
K3C
K3D
Z
–1
K39
Z
–1
K37
K38
K36
Z
–1
M0C
M0B
2
–7
2
–7
M0E
Z
–1
K3E
K23
TRK
AUTO Gain
TRK PWM
2
7
TRK JMP
M0F
2
–1
K19
DFCT
TRK
Hold Reg
TRK
In Reg
To SLD Servo, TRK Hold
Note) Set the MSB bit of the K39 and K3B coefficients to 0.
SLD Servo fs = 345Hz
K04
K03
Z
–1
K02
Z
–1
K01
K00
M00
2
–7
2
–7
M01
K05
K07
TRK
AUTO Gain
SLD PWM
2
–7
SLD MOV
M02
SLD
In Reg
2
–1
K30
SFSK (only when TGUP2 is used)
SFID
M0D
TRK SERVO FILTER
Second-stage output
Note) Set the MSB bit of the K02 and K04 coefficients to 0.
HPTZC/Auto Gain fs = 88.2kHz
K15
K17
Z
–1
K14
M08
M09
M0A
Z
–1
AUTO Gain
Reg
2
–1
AGTON
AGFON
AGFON
FCS
In Reg
TRK
In Reg
Sin ROM
Z
–1
Slice
TZC Reg
Slice
2
–1
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